Time-Interleaved Serial Receiver for High-Rate Linear Gain
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Solution Overview
Problem
Achieving linearity in analog amplifiers is challenging, particularly at high data rates, limiting the speed performance of wired communication receivers.
Innovation Solution
A serial receiver design combining continuous-time equalization, time-interleaving, and discrete-time variable-gain amplifiers to ensure linear amplification of high-speed signals, reducing the need for continuous-time amplification and operating within more linear voltage ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If continuous-time amplification is used to achieve high data rate reception, then the receiver can handle high symbol rates, but linearity becomes difficult to obtain and performance is limited
Solution Approach 1:
The patent divides the continuous-time amplification function into multiple discrete-time amplification stages. Instead of using a single continuous-time amplifier, the system employs multiple discrete-time variable-gain amplifiers that operate in parallel with different gain settings, thereby achieving the required overall gain while maintaining linearity and enabling high data rate reception.
2Power
If higher gain is applied to amplify weak signals, then signal strength increases, but voltage levels increase and linearity becomes more difficult to maintain
Solution Approach 1:
The patent segments the amplification process into multiple discrete-time stages, each contributing a portion of the total gain. This allows the system to achieve high overall signal strength while keeping individual stage voltage levels within linear operating ranges, thereby maintaining linearity throughout the amplification chain.
Solution Approach 2:
The patent dynamically adjusts the gain parameters of multiple discrete-time amplifiers based on signal conditions. By changing the gain parameters of individual amplifiers rather than using a single high-gain amplifier, the system maintains signal strength while operating within linear voltage ranges.
Data Source
AI summary
A serial receiver combines continuous-time equalization, analog interleaving, and discrete-time gain for rapid, efficient data reception and quantization of a serial, continuous-time signal. A continuous-time equalizer equalizes a received signal. A number N of time-interleaved analog samplers sample the equalized continuous-time signal to provide N streams of analog samples transitioning at rate reduced by 1/N relative to the received signal. A set of N discrete-time variable-gain amplifiers amplify respective streams of analog samples. A quantizer then quantizes the amplified streams of analog samples to produce a digital signal.