Time-Sharing Buffer Access System for Flash Memory Conflict Resolution

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Solution Overview

Problem

Conventional flash memory control systems experience low performance due to conflicts between master devices competing for buffer access, leading to inefficiencies as lower-priority devices must wait for higher-priority devices to finish tasks or release access rights.

Innovation Solution

A time-sharing buffer access system that employs buffer handling units and a time slot controller to allocate dedicated time slots for each master device, allowing simultaneous data transfer without conflicts by ensuring exclusive access during defined time periods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a priority rule is adopted to manage buffer access among master devices, then access conflict is resolved, but overall performance of master devices deteriorates due to waiting time

Engineering Contradiction:
Improvebuffer access conflict resolutionVSAvoidoverall performance of master devices
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The buffer access system is segmented into multiple independent buffer handling units (BHUs), each capable of servicing one master device at a time. This segmentation allows parallel processing across multiple units, eliminating the need for master devices to wait in a single priority queue, thus resolving the contradiction between conflict resolution and overall performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements periodic time slots for each buffer handling unit to service different master devices in a round-robin fashion. This periodic action ensures fair access for all master devices while maintaining continuous buffer operations, improving overall productivity without sacrificing conflict resolution capability.

Inventive Principle:
Principle #19Periodic action

2Productivity

If multiple master devices access the buffer simultaneously, then data transfer efficiency improves, but access conflicts increase

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidaccess conflict
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The buffer switch acts as an intermediary between master devices and the buffer, managing access requests and routing data flows. This intermediary controls simultaneous access requests, preventing conflicts while maintaining high data transfer efficiency through intelligent switching and arbitration mechanisms.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically allocates buffer handling units to master devices based on current access needs and data flow conditions. This dynamic assignment allows the system to adapt to varying workload patterns, enabling simultaneous data transfer for multiple active devices while maintaining reliable conflict-free access through real-time resource allocation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8938561B2Time-sharing buffer access system
Publication Date: 2015.01.20 YEESTOR MICROELECTRONICS CO LTD
  • US8938561B2 patent drawing
  • US8938561B2 patent drawing
  • US8938561B2 patent drawing

AI summary

A time-sharing buffer access system manages a buffer among plural master devices. Plural buffer handling units are operable to associatively couple the master devices, respectively, and a first end of each buffer handling unit is used to independently transfer data to or from the associated master device. A second end of each buffer handling unit is coupled to a buffer switch. A time slot controller defines a time slot, during which one of the buffer handling units is selected by the buffer switch such that data are only transferred between the selected buffer handling unit and the buffer.