Output Driver Calibration with Time-Shifted Pullup and Pulldown
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Solution Overview
Problem
Existing calibration circuits for integrated circuit output drivers face challenges in quickly calibrating with noise tolerance, especially when there is a large amount of parasitic capacitance on the bondpad coupled to the external reference impedance, leading to inefficiencies and potential damage from Electrostatic Discharge (ESD).
Innovation Solution
The calibration circuit time-shifts the calibration of strongest P-channel and N-channel drivers, allowing for simultaneous calibration of remaining drivers, and incorporates ESD protection devices to manage capacitance and minimize noise, enabling quick and accurate calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the calibration circuit calibrates P-channel and N-channel drivers simultaneously, then the calibration speed is improved, but noise increases due to both devices being switched in and out at the same time
Solution Approach 1:
The calibration process is segmented into two distinct phases: first calibrating P-channel drivers, then calibrating N-channel drivers. This temporal segmentation prevents simultaneous switching of both driver types, thereby reducing noise while maintaining calibration speed through sequential processing.
2Measurement precision
If the calibration circuit waits for node ZQ to settle before each calibration step, then measurement precision is improved, but the calibration time increases due to large parasitic capacitance
Solution Approach 1:
The circuit performs preliminary actions by pre-charging node ZQ to the target voltage level before the actual calibration measurement begins. This preliminary charging reduces the settling time required during the measurement phase, allowing faster calibration while maintaining voltage accuracy.
Solution Approach 2:
A dedicated charging circuit acts as an intermediary between the power supply and node ZQ, providing controlled charge transfer that quickly establishes the correct voltage level without requiring long settling times. This intermediary mechanism decouples the charging process from the measurement process.
3Reliability
If the calibration circuit operates in the background continually, then calibration accuracy is maintained, but it conflicts with user commands that create noise on power supplies
Solution Approach 1:
The calibration circuit operates periodically based on user-triggered events rather than continuously. This periodic operation allows the system to respond to user commands without constant background interference, while still maintaining calibration accuracy by performing calibration at appropriate intervals when needed.
Data Source
AI summary
An output driver calibration circuit includes a programmable drive strength output pullup driver including a strongest transistor and a number of other transistors, a programmable drive strength output pulldown driver including a strongest transistor and a number of other transistors, and a calibration circuit for generating a number of control signals for controlling the transistors in the output pullup driver and the transistors in the output pulldown driver, wherein the control signals are generated simultaneously, except for two the strongest driver transistors.