Time Sync Connector for Ethernet PTP Clock Domain Synchronization
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Solution Overview
Problem
Existing time synchronization solutions fail to efficiently address the conflicting requirements of different synchronization stacks in networked communication systems, particularly in automotive applications where Ethernet switches are integrated.
Innovation Solution
A software-based timing synchronization connection method using a time sync connector module with virtual Ethernet controllers and a virtual timestamp module, which abstracts the time sync connector from specific implementations and provides accurate time synchronization between standardized and bridging time sync stacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a gPTP stack software component is implemented with hardware timestamping, then time synchronization accuracy is improved, but device complexity increases
Solution Approach 1:
The patent introduces a time sync connector as an intermediary component that mediates between different time synchronization stacks (standardized and bridging). This connector handles the complexity of timestamp generation and frame forwarding, allowing each stack to operate independently while maintaining synchronization accuracy without requiring direct integration of hardware timestamping in both stacks.
Solution Approach 2:
The patent segments the time synchronization system into separate standardized time sync stack and bridging time sync stack, connected through a time sync connector. This segmentation allows each stack to be optimized for its specific function while the connector handles the integration complexity, reducing the overall device complexity compared to a unified implementation.
2Adaptability or versatility
If multiple different time synchronization stacks are integrated, then adaptability is improved, but device complexity increases
Solution Approach 1:
The time sync connector is designed as a universal component that can interface with multiple different time synchronization stacks (standardized and bridging). It provides multi-functional capabilities including timestamp generation, frame forwarding, and synchronization protocol handling, allowing the system to adapt to different stack configurations without requiring complex custom integration logic for each combination.
3Measurement precision
If hardware timestamping is used for time synchronization, then time synchronization accuracy is improved, but manufacturing cost increases
Solution Approach 1:
The patent implements software-based timestamp generation that copies the functionality of hardware timestamping without requiring physical hardware modifications. The time sync connector generates timestamps through software processing of network frames, providing equivalent time synchronization accuracy while eliminating the need for expensive hardware timestamping components in all stacks.
Solution Approach 2:
The patent replaces expensive hardware timestamping resources with software-based timestamp generation. The time sync connector uses standard Ethernet frame processing and software timing mechanisms to generate timestamps, significantly reducing manufacturing costs while maintaining sufficient accuracy for the application.
4Ease of operation
If standardized time synchronization stacks are used without bridging support, then ease of operation is improved, but functionality is reduced
Solution Approach 1:
The time sync connector acts as an intermediary that enables bridging functionality in standardized time sync stacks. It handles the complex tasks of frame forwarding and timestamp synchronization between standardized and bridging stacks, allowing the standardized stack to maintain its ease of operation while gaining extended bridging capabilities through the connector.
Data Source
AI summary
A time synchronization system, method, apparatus, and architecture are provided for synchronizing timing between two different time synchronization stacks with a timing synchronization connector which receives a frame transmit request at a first virtual Ethernet controller from a first time synchronization stack, which generates at a virtual timestamp module a sampled timestamp value for the frame by sampling a hardware counter, which forwards the sampled timestamp value for the frame over a second virtual Ethernet controller along with the frame to a second time synchronization stack, and which sends the sampled timestamp value for the frame to the first time synchronization stack, where the first and second time synchronization stacks each use the sampled timestamp value to compute a time synchronized Precision Time Protocol (PTP) clock domain signal.


