Time Synchronization Relay Segregating Packets for Fixed Delay
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Solution Overview
Problem
The accuracy of time synchronization between a master and slaves is compromised due to varying network delays caused by packet concentration in existing systems, which affects the reliability of time synchronization packets.
Innovation Solution
A time synchronization system is implemented with a master having separate processors for main and time synchronization functions, each with distinct IP addresses, and a relay that segregates packets accordingly, ensuring time synchronization packets are transmitted with a fixed and minimal delay, independent of ordinary packet transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If time synchronization packets are transmitted through the same relay buffer as ordinary packets, then the relay structure remains simple, but the network delay varies due to packet concentration and buffering
Solution Approach 1:
The master apparatus is segmented into two separate processors: a main processor for handling ordinary packets and a time synchronization processor for handling time synchronization packets. This segmentation allows time synchronization packets to be processed independently with fixed priority, eliminating delay variability caused by ordinary packet concentration while maintaining a relatively simple relay structure.
Solution Approach 2:
The time synchronization processor acts as an intermediary component between the relay and the time synchronization function. It receives time synchronization packets from the relay with fixed priority, performs time stamp calculations, and generates time synchronization information, thereby isolating the time synchronization function from the variability of ordinary packet processing.
2Loss of time
If time synchronization packets are given highest priority in the relay buffer, then network delay is minimized, but ordinary packet transmission is affected and system reliability deteriorates
Solution Approach 1:
The system segments packet processing into two independent paths: one for ordinary packets handled by the main processor and another for time synchronization packets handled by the time synchronization processor. This allows time synchronization packets to receive fixed priority treatment without disrupting ordinary packet transmission, maintaining both low delay and high reliability.
Solution Approach 2:
The time synchronization processor serves as an intermediary that receives time synchronization packets directly from the relay with fixed priority, processes them independently, and generates time synchronization information. This intermediary structure ensures that time synchronization packets are not blocked by ordinary packets while ordinary packet transmission continues unaffected.
3Productivity
If multiple packets are transmitted simultaneously from multiple slaves to the master, then communication efficiency is improved, but network delay variability increases due to packet concentration at the relay
Solution Approach 1:
The master apparatus segments incoming packets into two categories using the relay: ordinary packets routed to the main processor and time synchronization packets routed to the time synchronization processor. This segmentation ensures that even when multiple slaves transmit simultaneously, time synchronization packets maintain fixed priority and consistent delay regardless of ordinary packet concentration.
Solution Approach 2:
The time synchronization processor acts as an intermediary that receives time synchronization packets with fixed priority from the relay, independent of ordinary packet processing. This allows multiple slaves to communicate efficiently simultaneously while time synchronization packets experience consistent, predictable delay.
Data Source
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AI summary
A time synchronization system includes: a master including: a main processor to which a first IP address is assigned; and a time synchronization processor to which a second IP address is assigned; a plurality of slaves configured to send a first packet whose destination is the first IP address and a second packet whose destination is the second IP address to the master; and a relay configured to send the first packet to the main processor and to send the second packet to the time synchronization processor. The main processor receives the first packet from the relay and performs a certain process on the first packet. The time synchronization processor receives the second packet from the relay and performs a time synchronization process between the master and said one of the slaves based on the second packet.