Timebase Alignment via Dynamic Reference Clock Frequency

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Solution Overview

Problem

Current methods for achieving synchronization in distributed measurement and control systems, such as those using the IEEE-1588 protocol, fail to effectively align timebases and generate synchronized periodic signals across multiple devices, especially when sampling clock frequencies are not integer multiples of a common reference clock, leading to issues with trigger synchronization and metastability.

Innovation Solution

A system and method that aligns a local timebase to a remote timebase using a timebase error value from a higher-level protocol, employing a Direct Digital Synthesizer (DDS) or Numerical Controlled Oscillator (NCO) to adjust the frequency of the periodic signal, allowing for the generation and distribution of synchronized events and adjustable frequency periodic signals, ensuring tight synchronization across the domain.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a common reference clock is used to synchronize multiple devices, then trigger synchronization is improved, but devices with non-integer multiple sampling clock frequencies experience metastability and synchronization failure

Engineering Contradiction:
Improvetrigger synchronizationVSAvoidfrequency compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent changes the frequency parameter of the reference clock dynamically. Instead of using a fixed common reference clock frequency, the system adjusts the reference clock frequency to be an integer divisor of both the first and second sampling clock frequencies, enabling synchronization between devices with different sampling rates without causing metastability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system dynamically selects and switches between different reference clock frequencies based on the operational mode and sampling rates of connected devices. The reference clock can be configured to different frequencies (e.g., 10 MHz, 20 MHz, 40 MHz, 80 MHz, 160 MHz, 320 MHz, 640 MHz, 1.28 GHz, 2.56 GHz) to adapt to various device combinations, making the synchronization system flexible and versatile

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If different sampling clock frequencies are used in multiple devices, then device versatility is improved, but achieving digital synchronization becomes difficult or impossible

Engineering Contradiction:
Improvesampling rate flexibilityVSAvoiddigital synchronization
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces a reference clock as an intermediary between devices with different sampling clock frequencies. This reference clock serves as a common timing basis that both devices can use to achieve synchronization, even when their native sampling frequencies differ. The reference clock acts as a mediator that translates between different frequency domains

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system changes the reference clock frequency parameter to match the greatest common divisor of the sampling frequencies involved. By dynamically adjusting the reference clock frequency based on the operational requirements and device capabilities, the system maintains digital synchronization while supporting versatile sampling rates

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a fixed reference clock frequency is used, then system simplicity is improved, but the system cannot accommodate devices with various sampling clock frequencies

Engineering Contradiction:
Improvesynchronization system complexityVSAvoidfrequency range support
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The synchronization system is made dynamic by allowing the reference clock frequency to be changed based on operational mode and device requirements. The system can switch between multiple predefined frequency values, providing adaptability without requiring complex real-time frequency synthesis. This dynamic configuration approach balances simplicity with versatility

Inventive Principle:
Principle #15Dynamics

4Speed

If the reference clock frequency is increased to support higher sampling rates, then sampling rate capability is improved, but devices with lower sampling rates may lose synchronization

Engineering Contradiction:
Improvesampling rate capabilityVSAvoidsynchronization maintenance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The system changes the reference clock frequency parameter dynamically based on the sampling rates of active devices. When high-speed devices are operating, the reference clock is increased to support their requirements. When only low-speed devices are active, the reference clock is reduced to maintain synchronization. This parameter adaptation ensures both high sampling rate capability and reliable synchronization maintenance

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7801258B2Aligning timebases to share synchronized periodic signals
Publication Date: 2010.09.21 NATIONAL INSTRUMENTS CORP
  • US7801258B2 patent drawing
  • US7801258B2 patent drawing
  • US7801258B2 patent drawing

AI summary

A system and method for aligning a local timebase to a remote timebase given a timebase error value from a higher-level protocol, and using the aligned timebases to generate and distribute synchronized events and synchronized adjustable frequency periodic signals across a domain using the aligned timebases. Slightly speeding up or slowing down a periodic signal used to count time, a local timebase may be aligned to a remote timebase when given an error value from a higher-level protocol. A device may be configured to begin generating a periodic waveform at an agreed upon time in the future, once the timebases are aligned, where the time may be synchronized to remote devices via a synchronization protocol and an alignment mechanism. Remote periodic signals may remain synchronized to each other as long as the higher-level protocol and timebase alignment algorithm keep the timebases aligned. A common reference periodic signal may be shared between all devices, and the reference periodic signal or a conditioned version of the reference periodic signal may be specified as the periodic signal to control the operation of the timebase circuitry. The common reference periodic signal may improve synchronization performance beyond the capabilities of the higher-level protocol, and may in addition provide means for synchronization fault tolerance.