Microcontroller Timebase Peripheral Event Triggering Flexibility

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Solution Overview

Problem

Conventional timebase peripherals in microcontrollers only generate synchronization/trigger events associated with timebase period rollover, limiting their ability to trigger events like ADC conversion or time delay concurrently with qualified input capture events, thereby restricting flexibility in configuring event timing and interactions between peripherals.

Innovation Solution

The enhanced timebase peripheral includes additional comparators, registers, and multiplexers that allow selection of various event signals for synchronization/trigger outputs, enabling operation in both synchronization and trigger modes with flexible clock sources, and integrating input capture and output compare logic to generate event signals for triggering other peripherals or events.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional timebase peripheral is used, then the structure is simple, but the ability to trigger events concurrently with input capture events is limited

Engineering Contradiction:
Improveability to trigger eventsVSAvoidperipheral structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The timebase peripheral is enhanced to perform multiple functions: it can generate traditional period rollover sync/trigger events, and simultaneously generate alternate sync/trigger events concurrent with qualified input capture events. This multi-functionality allows a single peripheral to serve both conventional and advanced timing needs, resolving the contradiction between versatility and complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The timebase peripheral is segmented into distinct functional components: the original period rollover event generation logic and the new input capture event generation logic. Each segment operates independently but contributes to the overall synchronization and triggering capabilities, allowing the system to maintain simplicity while adding enhanced functionality.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If conventional timebase peripheral is used, then the peripheral structure is simple, but the flexibility in configuring event timing is restricted

Engineering Contradiction:
Improveflexibility in configuring event timingVSAvoidperipheral structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The timebase peripheral incorporates dynamic configurability through control registers that allow users to select between different synchronization and trigger modes. The peripheral can dynamically switch between generating only period rollover events, only input capture events, or both types of events based on application requirements, providing flexible event timing configuration without permanent structural complexity.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If conventional timebase peripheral is used, then the device is simple, but the ability to trigger ADC conversion, time delay, or other events concurrent with input capture events is not provided

Engineering Contradiction:
Improveevent triggering capabilityVSAvoidperipheral structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The timebase peripheral acts as an intermediary between the input capture logic and other peripheral devices. It receives the timebase clock signal, processes it through the enhanced logic that detects qualified input capture events, and generates appropriate sync/trigger output events that can concurrently trigger ADC conversions, time delays, and other peripheral events, bridging the gap between capture events and peripheral triggering.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP2810137B1Timebase peripheral
Publication Date: 2018.05.02 MICROCHIP TECHNOLOGY INC
  • EP2810137B1 patent drawingFigure 1
  • EP2810137B1 patent drawingFigure 2
  • EP2810137B1 patent drawingFigure 3

AI summary

A microcontroller has a timebase (110) driven by a clock signal, wherein the timebase has a reset input and an output coupled with a comparator (140). The comparator is further coupled with a register (150) and is operable to generate a synchronization output (sync out) signal if the timebase matches the register value. The microcontroller further has a first multiplexer (250) receiving the synchronization output signal from the comparator and further receiving at least one event signal generated by a unit other than the timebase, wherein the first multiplexer is operable to select either the synchronization output signal or the at least one event signal as a timebase synchronization output signal (260).