Timer-Based Virtual Processor Scheduling for Timing Accuracy

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Solution Overview

Problem

Virtual processor scheduling methods in virtualized computer systems often lead to skewing of the virtual machine's real-time clock due to their timer-agnostic nature, causing adverse consequences such as timing inaccuracies and potential system instability.

Innovation Solution

Implementing a timer-based scheduling method that involves suspending a preempted or yielding virtual processor for a time period less than the remaining time until the next scheduled timer interrupt, ensuring the virtual processor is running at the time of the interrupt, using calculations such as Ts=(Tint−Tcur)/N or Ts=(Tint−k), where Ts is the suspension time, Tint is the next scheduled timer interrupt time, Tcur is the current time, and N or k is a positive integer, to maintain timer integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If timer-agnostic virtual processor scheduling is used, then processor utilization is improved, but timing accuracy deteriorates

Engineering Contradiction:
Improveprocessor utilizationVSAvoidtiming accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The scheduling method incorporates feedback from timer interrupts to adjust virtual processor scheduling decisions. The hypervisor monitors timer interrupt timings and uses this feedback to calculate appropriate suspension times, ensuring that virtual processors are suspended for durations that maintain accurate timing while still allowing efficient processor utilization. This feedback mechanism resolves the contradiction by continuously adapting scheduling behavior based on actual timer performance.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The invention changes the scheduling parameter from fixed timer-agnostic time slices to dynamic suspension times calculated based on remaining timer interrupt intervals. By adjusting the suspension duration parameter according to the specific timing context and timer interrupt schedule, the system achieves both efficient processor utilization and accurate timing maintenance.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If virtual processors are suspended to maintain timer accuracy, then timing precision is improved, but system responsiveness deteriorates

Engineering Contradiction:
Improvetimer accuracyVSAvoidsystem responsiveness
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The scheduling method applies partial suspension actions rather than complete suspensions. By calculating suspension times that are less than the full timer interrupt interval (using formulas such as Ts=(Tint−Tcur)/N or Ts=(Tint−k)), the system maintains timer accuracy while leaving some processing time available. This partial action approach ensures timing precision is improved without excessively reducing system responsiveness.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The hypervisor performs preliminary calculations of suspension times based on predicted timer interrupt timings before actual scheduling decisions are made. By pre-calculating appropriate suspension durations using the remaining timer interrupt interval, the system can proactively maintain timer accuracy while planning responsive scheduling decisions that minimize impact on system performance.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9778943B2Timer based virtual processor scheduling and suspension on physical processor for use of physical processor by other processing
Publication Date: 2017.10.03 RED HAT ISRAEL
  • US9778943B2 patent drawing
  • US9778943B2 patent drawing
  • US9778943B2 patent drawing

AI summary

Systems and methods for timer-based virtual processor scheduling. An example method may comprise: selecting, by a hypervisor executing on a computer system, an active virtual processor among two or more virtual processors; determining a first time period being less than a second time period, the second time period equal to a time remaining till a next scheduled timer interrupt of a timer communicatively coupled to the active virtual processor; and suspending the active virtual processor for at least the first time period.