Timer Calibration Circuit for Offline Clock Frequency Fluctuations

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Solution Overview

Problem

Offline timers in electronic devices experience inaccuracies due to fluctuations in source clock frequency caused by internal chip processes and environmental changes, leading to unexpected control behavior in control systems.

Innovation Solution

A timer calibration method that involves a calibration circuit coupled with a clock device and a timer, performing a fitting operation to generate a fitting function based on clock frequency and timer output, adjusting the timer values to improve accuracy without external calibration parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If offline timer is used for timing functions, then timing function is provided, but timing accuracy deteriorates due to clock frequency fluctuations

Engineering Contradiction:
Improvetiming accuracyVSAvoidtimer measurement precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the actual timer output is measured and compared against the expected value based on clock frequency. The calibration circuit uses this feedback to generate a calibration factor that compensates for frequency deviations, thereby improving timing accuracy while maintaining reliable offline timing functionality

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent changes the parameter of clock frequency measurement and uses this information to dynamically adjust the timer calibration. By measuring the actual clock frequency and comparing it with the nominal frequency, the system adjusts timing parameters to compensate for frequency fluctuations, resolving the contradiction between providing timing functions and maintaining measurement precision

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If calibration circuit is added to improve timing accuracy, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvetimer measurement precisionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the calibration circuit functionality with the existing timer and clock devices. The calibration circuit is integrated into the timer module, sharing resources and reducing overall device complexity. The calibration function is combined with the existing timing infrastructure rather than being implemented as a completely separate system

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The calibration circuit performs self-calibration by automatically measuring its own timing deviations and adjusting its operation accordingly. The system uses its existing resources (clock device, timer output) to calibrate itself without requiring external calibration equipment or complex external control circuits, thereby improving measurement precision while minimizing the increase in device complexity

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11803208B2Timer calibration method and electronic device
Publication Date: 2023.10.31 HEFEI CORE STORAGE ELECTRONICS LTD
  • US11803208B2 patent drawing
  • US11803208B2 patent drawing

AI summary

A timer calibration method and an electronic device are disclosed. The method includes: performing a fitting operation according to a clock frequency of a clock device and an output of a timer to generate a fitting function; obtaining a first value output by the timer; and adjusting the first value to be a second value according to the fitting function to calibrate the timer.