Timer Circuit for Autonomous I/O Pin Floating on Reset Faults
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Solution Overview
Problem
In safety-critical systems, faults in the reset controller or interrupt controller can prevent the processing circuit from transitioning its I/O pins to a safe floating state, even if a watchdog circuit detects a fault, leading to potential unsafe operation.
Innovation Solution
A timing circuit, such as a watchdog circuit, is configured to independently trigger electrical floating of I/O pins and non-maskable interrupts without intervention from the reset or interrupt controllers, ensuring the system can still be brought to a safe state even if these controllers fail.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a watchdog circuit detects a fault and triggers a reset controller to initiate a system reset, then the processing circuit is intended to be placed in a safe state with I/O pins set to electrically floating states, but faults in the reset controller can prevent the I/O pins from transitioning to the floating state, leading to unsafe operation
Solution Approach 1:
The patent segments the fault recovery function into multiple independent components: the watchdog circuit, the reset controller, and a newly introduced autonomous floating circuit. This segmentation ensures that a failure in one component (e.g., reset controller) does not prevent the entire safety mechanism from functioning, as other segments (autonomous floating circuit) can still execute their designated safety functions independently.
Solution Approach 2:
The autonomous floating circuit acts as an intermediary between the watchdog circuit and the I/O pins. When the reset controller fails to properly float the I/O pins, the autonomous floating circuit serves as a backup mediator that directly controls the I/O pins to achieve the floating state, ensuring safety even when the primary path is blocked.
2Reliability
If the system uses a reset controller to initiate system resets and float I/O pins, then the system can respond to faults, but faults in the reset controller or interrupt controller can prevent the system from being brought to a safe state
Solution Approach 1:
The patent implements beforehand cushioning by providing redundant safety mechanisms (autonomous floating circuit and independent watchdog triggering) that are prepared in advance to compensate for potential failures in the primary reset controller. This ensures that even if the primary mechanism fails, backup mechanisms are already in place to prevent unsafe operation.
Solution Approach 2:
The patent changes the operational parameters of the safety system by introducing independent control paths for floating I/O pins that bypass the reset controller's normal operation. The autonomous floating circuit changes the state control parameter from being reset-controller-dependent to being watchdog-circuit-dependent, thereby altering the system's vulnerability profile.
3Productivity
If the watchdog circuit triggers system reset through the reset controller, then fault recovery is achieved, but the probability of unsafe operation increases due to potential failures in the reset or interrupt controllers
Solution Approach 1:
The patent creates a copy of the safety function by implementing the autonomous floating circuit that replicates the I/O pin floating capability independently of the reset controller. This copying ensures that the critical safety function (floating I/O pins) is preserved even if the original control path through the reset controller fails.
Data Source
AI summary
An electrical system includes an integrated circuit device including input/output (I/O) pins, a reset circuit, and an I/O circuit. The I/O circuit is operably coupled to the I/O pins. The I/O circuit is configured to selectively operate the I/O pins in an electrically floating state responsive to a system reset signal transmitted by the reset circuit. The I/O circuit is further configured to selectively operate the I/O pins in the electrically floating state responsive to a signal provided by a timer circuit independently from the reset circuit.