Timer Manager Controller Offloading Processing Load

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Solution Overview

Problem

In highly virtualized processing systems, managing a large number of timers efficiently is challenging due to the significant processing resources required for timer management, especially when strict partitioning of resources is necessary across different virtual environments.

Innovation Solution

A dedicated timer manager controller is introduced that creates, maintains, and deletes timer manager instances, offloading timer management from general-purpose processors and using a debug interrupt timer controller to associate configuration information with timer commands for error detection and debugging, thereby reducing the load on general-purpose processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If software manages a large number of timers using a linked list structure, then the number of implementable timers increases, but the processing resource demand increases significantly

Engineering Contradiction:
Improvenumber of timersVSAvoidprocessing resource demand
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments timer management into multiple independent hardware timer units, each capable of managing its own timer queue. This distributes the processing load across multiple hardware entities rather than concentrating all timer management in software, thereby increasing the total number of manageable timers while reducing the processing resource demand on any single component.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hardware timer management unit that acts as an intermediary between software applications and the actual timer execution. This hardware intermediary handles the complex operations of timer creation, deletion, and queue management, freeing software from these resource-intensive tasks while still supporting a large number of timers through efficient hardware-based linked list manipulation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If timer software manages partitioning of timers for each virtual environment, then resource partitioning precision improves, but the demand for dedicated processing resources increases

Engineering Contradiction:
Improveresource partitioning precisionVSAvoidprocessing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent enables each virtual environment to self-manage its timer resources through dedicated hardware timer units that autonomously handle timer creation, maintenance, and deletion for their respective virtual machines. This self-service approach achieves precise resource partitioning for each virtual environment while eliminating the need for centralized software management, thereby maintaining high processing efficiency across the entire system.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10216663B2System and method for autonomous time-based debugging
Publication Date: 2019.02.26 NXP USA INC
  • US10216663B2 patent drawing
  • US10216663B2 patent drawing
  • US10216663B2 patent drawing

AI summary

A processing system includes a general purpose instruction based data processor, an input configured to receive a command written by the data processor, a timer manager controller configured to receive the command and to execute the command, and a debug interrupt timer controller (DITC) configured to determine that the command is directed to the DITC and to store configuration information that associates the command with an element of the processing system that is a source of the command, where the configuration information is included in the command.