Timer Module Internal Activity Monitoring via Polling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current timer modules in control units, particularly in the automotive field, lack comprehensive safety checks for internal signal and module activities, relying only on output signal verification, which limits their operational reliability.
Innovation Solution
Incorporating an external arithmetic unit or CPU to perform regular polls for monitoring internal signals and units within the timer module, eliminating the need for pre-configured timeout values and enabling the detection of inactivity in critical components like the clock signal or clock generator unit, with error status identification in a status register for enhanced reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If comprehensive monitoring of internal signals and units is implemented, then safety and reliability are improved, but device complexity increases
Solution Approach 1:
The patent introduces a monitor unit as an intermediary component that acts as a mediator between the timer module's internal units and the external CPU. This monitor unit contains activity checkers that independently monitor internal signals and units, generating status information that is then provided to the external CPU. This intermediary structure enables comprehensive safety monitoring without requiring the external CPU to directly interface with and complexly manage all internal timer signals.
Solution Approach 2:
The monitor unit provides self-service functionality by autonomously generating activity status information about internal timer module signals and units. The activity checkers within the monitor unit automatically detect and report the operational status of clock signals, counter signals, and other internal units without requiring external intervention or complex configuration, thereby simplifying the overall system while improving reliability.
2Adaptability or versatility
If pre-configured timeout values are used for monitoring, then device complexity is reduced, but adaptability to changing conditions deteriorates
Solution Approach 1:
The patent implements dynamic adaptability by allowing the external CPU to flexibly determine polling intervals based on changing operational conditions. Instead of using fixed pre-configured timeout values, the system enables the CPU to adapt the frequency and timing of activity checks according to real-time requirements, thereby achieving high adaptability without requiring complex internal timeout configuration mechanisms within the timer module itself.
Solution Approach 2:
The monitoring function is segmented between the monitor unit's activity checkers and the external CPU. The monitor unit handles the generation of status information, while the external CPU handles the decision-making regarding when to poll and how to respond. This segmentation allows the timer module to remain simple while the external system provides the necessary adaptability through intelligent polling strategies.
3Measurement precision
If monitoring of clock signal and routing unit is performed, then detection precision of inactivity is improved, but device complexity increases
Solution Approach 1:
The patent implements preliminary monitoring by placing activity checkers within the monitor unit that continuously and proactively monitor critical internal signals such as clock signals and routing unit activities. These checkers are positioned to detect inactivity at the source, before it can propagate through the system and cause failures. This preliminary detection approach achieves high measurement precision for inactivity detection without requiring complex post-failure analysis systems.
Data Source
AI summary
A timer module having a status register is connectable to an external arithmetic unit and generates at least one activity signal for an internal signal of the timer module and/or an internal unit of the timer module and/or a process within the internal unit, and enters an activity status into a status register in the event of a determined activity, and allows the activity status to be polled and reset by the external arithmetic unit at times determined by the external arithmetic unit. Furthermore, the activity status entered into the status register remains until it is reset by the external arithmetic unit.