Timer-Based PFM Exit Control for Boost Regulator Mode Transition
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Solution Overview
Problem
Switching regulators face challenges in transitioning between Pulse Frequency Modulation (PFM) and Pulse Width Modulation (PWM) modes efficiently due to low output voltage ripple from low Equivalent Series Resistance (ESR) capacitors, which affects feedback control and load condition monitoring.
Innovation Solution
A timer-based PFM exit control method is implemented in boost switching regulators to determine the transition point from PFM to PWM mode by sensing the idle time between inductor current pulses, allowing for a clean and efficient mode transition without relying on feedback voltage information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If low ESR capacitors are used to reduce output voltage ripple, then output voltage stability is improved, but feedback control reliability deteriorates due to insufficient ripple for meaningful feedback
Solution Approach 1:
A timer-based idle time detection mechanism is introduced as an intermediary to monitor the time between consecutive switching cycles. This timer provides a reliable indicator of load conditions and PFM mode operation status, replacing the inadequate feedback voltage ripple signal for control decisions.
2Loss of energy
If PFM mode is used for light load conditions to maximize efficiency, then energy efficiency is improved, but transition control to PWM mode becomes unreliable due to low feedback voltage ripple
Solution Approach 1:
The patent replaces the electrical feedback voltage ripple-based control mechanism with a time-based control mechanism. A timer measures the idle time between switching cycles, and this time measurement replaces the unreliable voltage ripple signal for determining when to transition from PFM to PWM mode.
3Device complexity
If feedback voltage is used to determine PFM exit point, then control simplicity is maintained, but measurement accuracy deteriorates due to ripple injection in PFM mode
Solution Approach 1:
The timer acts as an intermediary measurement device that indirectly monitors load conditions by measuring idle time, rather than directly measuring the corrupted feedback voltage. This intermediate time-based measurement provides accurate PFM exit point detection without being affected by ripple injection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Ensures smooth and reliable transitions between PFM and PWM modes, maintaining output voltage stability and efficiency across varying load conditions, even when ripple injection is used in the PFM mode.
Implementation Method 1
A power switch is turned on to apply energy to an inductor to allow the current through the inductor to build up. When the power switch is turned off, the voltage across the inductor reverses and energy is transferred to an output capacitor and the load.
Implementation Method 2
A relatively constant output voltage is maintained by the output capacitor.
Data Source
AI summary
A control circuit in a PFM/PWM boost switching regulator includes a timer based PFM exit control circuit configured to receive a first control signal for controlling a main power switch, a zero-cross signal indicative of an inductor current having reached zero current value, and a timer reference signal indicative of a timer threshold duration. The timer based PFM exit control circuit assesses an idle time of the inductor current based on the first control signal and the zero-cross signal. The timer based PFM exit control circuit asserts the PFM exit signal in response to the idle time decreasing below a level being equal to or less than the timer threshold duration, and the boost switching regulator transitions out of the PFM mode and into the PWM mode in response to the PFM exit signal being asserted.