Counter-Based Timer Translator for Precise Time Synchronization
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Solution Overview
Problem
Existing electronic timer systems face challenges in achieving precise time synchronization over data communications due to unpredictable delays in packet networks, which limit synchronization accuracy and increase complexity and power consumption.
Innovation Solution
A counter-based time generator with a translator that operates on the relation tp=A·tr+B, where tp is local precise time and tr is raw base time, using configurable parameter values A and B to adjust clock speed and time settings without changing the oscillator frequency, allowing for simple, cost-effective, and power-efficient operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If adjustable oscillators or dedicated adders are used to achieve precise time generation, then time precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent uses a simple counter to generate raw time values and a translator to compute precise time values through mathematical transformation (tp=A·tr+B). This copying approach replaces complex hardware (adjustable oscillators, dedicated adders) with a simple counter and software-based translation, achieving high precision time generation without increasing device complexity
Solution Approach 2:
The patent replaces mechanical/time-based hardware adjustment mechanisms (adjustable oscillators) with a software-based translation system. The translator uses configurable parameters A and B to adjust clock speed and time settings mathematically, eliminating the need for physical hardware adjustments while maintaining precision
2Measurement precision
If adjustable oscillators or dedicated adders are used to achieve precise time generation, then time precision is improved, but power consumption increases
Solution Approach 1:
The patent uses a simple counter driven by a fixed-frequency oscillator to generate raw time values, which are then translated to precise time values through software computation. This approach consumes significantly less power than using adjustable oscillators or dedicated adder hardware, as the fixed-frequency oscillator requires minimal power and the translation can be performed efficiently using existing processor arithmetic resources
Solution Approach 2:
The patent achieves time precision adjustment by changing software parameters (configurable values A and B in the translation formula tp=A·tr+B) rather than changing hardware operating conditions. This allows precise time control without the power consumption associated with adjusting oscillator frequencies or activating dedicated hardware circuits
3Adaptability or versatility
If packet networks are used for time distribution, then adaptability is improved, but synchronization accuracy deteriorates due to unpredictable delays
Solution Approach 1:
The patent uses timestamps to record the exact transmission and reception times of time distribution packets. By capturing these time values in advance and using them for compensation calculations, the system can predict and correct for network delays, maintaining synchronization accuracy despite the use of flexible packet networks
Solution Approach 2:
The patent implements a feedback mechanism where the translator uses timestamp data from received packets to calculate and apply compensation values to the generated time values. This closed-loop approach continuously adjusts for network delay variations, maintaining synchronization accuracy while preserving the adaptability of packet network transmission
Data Source
AI summary
An electronic timer system includes a counter-based time generator (10) for continuously generating raw base time, and a translator (20) for translating between raw base time and local precise time using configurable parameter values. The timer system can be used for generating local precise time by capturing a raw base time value from the counter-based time generator (10) in response to an external event such as a trigger pulse, and using the translator (20) to calculate local precise time from the raw base time value and the parameter values. The timer system can also be used for generating a precisely timed output signal using the translator (20) for translation from precise time of a desired timing event to raw base time. This novel design enables simple and cost-effective practical implementations, and may also support power effective operation of the timer system.