Timer Unit for Logic Circuit Self-Test Mode Safety
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Solution Overview
Problem
Existing systems for testing logic circuits face risks of self-test software activation without a watchdog timer, leading to potential interference with the application and safety issues due to unintentional entry into test modes.
Innovation Solution
A test timer unit with a timer and comparator is introduced to measure the duration of the logic circuit in self-test mode, comparing it with a threshold to prevent runaway and ensure safety, and detect accidental mode entries by starting and stopping the timer independently of the application operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If self-test software is activated to test the logic circuit, then the ability to detect physical defects is improved, but the risk of unintended activation and interference with the application increases
Solution Approach 1:
The system performs preliminary actions by setting up a watch-dog timer and establishing a test window schedule before self-testing begins. The watch-dog timer is pre-configured with a threshold value, and the test window is pre-defined in the application schedule, ensuring that self-testing can only occur at appropriate times without interfering with critical application operations.
Solution Approach 2:
The system implements feedback mechanisms where the watch-dog timer continuously monitors whether the current time falls within the test window. If self-test activation is detected outside the test window, the system generates an error indication. This feedback loop ensures that self-testing only proceeds when conditions are appropriate, preventing harmful interference with the application.
2Measurement precision
If the watch-dog timer is used to measure self-test duration, then the ability to detect timing errors is improved, but the risk of unintentional non-activation due to faults increases
Solution Approach 1:
The system employs self-service mechanisms where the logic circuit itself participates in verifying the watch-dog timer's operation. During self-testing, the logic circuit executes test routines that specifically check whether the watch-dog timer was properly activated and whether it correctly measured the test duration. This self-verification ensures that even if activation faults occur, they are detected and reported.
Solution Approach 2:
The system applies preliminary anti-action by implementing multiple verification checks before and during self-testing to prevent undetected activation failures. The logic circuit performs preliminary checks to ensure the watch-dog timer is properly activated, and continuous monitoring during testing ensures that any activation failures are immediately detected and reported as errors.
3Productivity
If self-test software is activated outside the test window, then testing can be performed, but safety risks and application interference increase
Solution Approach 1:
The system establishes a predetermined test window in the application schedule before operation begins. This preliminary action defines the safe time periods when self-testing can occur without interfering with critical application functions. The watch-dog timer is pre-configured with threshold values corresponding to this test window, ensuring that testing is restricted to safe periods.
Solution Approach 2:
The system continuously monitors the current time against the predetermined test window and provides feedback on whether activation is appropriate. If self-test activation is detected outside the test window, the system immediately generates an error indication, preventing unsafe testing from proceeding. This feedback mechanism ensures that productivity is maintained within safe boundaries.
Data Source
AI summary
A timer unit includes a timer for timing the period of time the logic circuit has been in the self-test mode. A comparator is connected to the timer, for comparing the period of time with a maximum for the period of time the logic circuit is allowed to be in the self-test mode and outputting an error signal when the period of time exceeds the maximum. The test timer unit further includes a mode detector for detecting a switching of the logic circuit to the self-test mode. The mode detector is connected to the timer, for starting the timer upon the switching to the self-test mode and stopping the timer upon a switching of the logic circuit out of the self-test mode. The timer unit can be used in a system for testing a logic circuit which includes a test routine module containing a set of instructions which forms a test routine for performing a test on a tested part of the logic circuit. The system has a mode control unit containing a set of instructions which is executable by the logic circuit, for switching the logic circuit from and to a test mode in which a part of the logic circuit can be subjected to a selected test by executing a selected test routine.