Time-Shared Bi-Directional Serial Signaling System
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Solution Overview
Problem
Current chipsets with multiple integrated circuits require numerous electrical connections and cables for parallel signal transmission, leading to larger, heavier, and more costly interfaces due to issues with timing and signal skewing, making full integration of communication systems challenging.
Innovation Solution
A time-shared bi-directional serial signaling system using a differential signal path with embedded clock and transceiver circuitry for both host and target chips, allowing high and low bandwidth data signals to be transmitted and received over a single communication path, reducing the need for multiple connections and optimizing signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If parallel signals are transmitted between host and target chips, then data transfer speed is increased, but the number of electrical connections, cables and connectors increases leading to larger, heavier and more costly interface
Solution Approach 1:
The patent merges multiple parallel data signals into a single serial communication channel by time-division multiplexing. Forward data signals (multiple bits) and return data signals are transmitted sequentially over one shared differential signal path, eliminating the need for multiple parallel connections while maintaining high data transfer rates through efficient time-sharing of the communication medium.
Solution Approach 2:
The single differential signal path serves multiple functions: transmitting forward data, transmitting return data, and carrying clock signals. The host transceiver and target transceiver share the same physical medium for bidirectional communication, making the interface more versatile and reducing the overall number of required connections.
2Adaptability or versatility
If multiple integrated circuits communicate with multiple signals, then complete system functions are achieved, but timing issues and signal skewing increase making the interface larger and more costly
Solution Approach 1:
The patent employs periodic time-division multiplexing where forward data transmission and return data transmission occur in alternating time slots. Each transmission phase is synchronized to the embedded clock signal, creating a periodic pattern that eliminates timing conflicts and signal skewing between multiple signals. The host transceiver and target transceiver switch between transmitting and receiving modes in a regular, predictable cycle.
Solution Approach 2:
The embedded clock signal acts as an intermediary that synchronizes all data transmissions. By encoding the clock within the data stream and using it to coordinate the timing of forward and return data transmissions, the system achieves precise timing without requiring separate clock lines or complex external synchronization circuitry.
3Device complexity
If a single communication path is used for bi-directional serial signaling, then the number of connections is reduced, but achieving full duplex communication becomes more challenging
Solution Approach 1:
The patent implements dynamic time-division multiplexing where the direction of data flow changes over time. The host transceiver transmits forward data during one time interval while the target transceiver transmits return data during another time interval. This dynamic switching allows both directions of communication to share the same physical path without interference, achieving full duplex functionality with half the number of connections.
Solution Approach 2:
The system performs preliminary synchronization by embedding the clock signal within the data stream before transmission. The receiving transceiver recovers the clock signal and uses it to prepare for the upcoming data phase, ensuring that data is sampled at the correct time. This preliminary clock recovery and synchronization enables reliable communication over the shared path without requiring the path to be dedicated to one direction.
Data Source
AI summary
A time shared bi-directional serial signaling system providing a differential signal with apparent duplex signal operation for higher and lower bandwidth data signals in a forward direction and another lower bandwidth data signal in a return direction.