Timestamp Calibration for Asynchronous Image Sensors
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Solution Overview
Problem
Asynchronous image sensors face systematic errors in timestamp calibration due to pixel location, leading to precision limitations and increased power consumption, especially in large format and high frame rate applications.
Innovation Solution
Mapping the delay between the trigger and counter or ramp, located outside the pixel, to correct timing errors across the focal plane array, using synchronized optical or electrical inputs and error maps stored on-chip or in an image processor, without increasing device size or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If a counter or ramp is located outside the pixel to reduce power consumption and device size, then power dissipation and pixel area are reduced, but systematic timing errors are introduced due to signal propagation delays from different pixel locations
Solution Approach 1:
The patent performs preliminary characterization of systematic timing errors for each pixel location during manufacturing or calibration. These error values are stored in lookup tables within or associated with each pixel, enabling real-time correction without requiring complex hardware per pixel. This preliminary action resolves the contradiction by pre-computing correction factors that compensate for the timing errors introduced by the centralized counter/ramp location.
Solution Approach 2:
The patent implements a feedback mechanism where the systematic timing errors are measured and characterized, then used to generate correction values that are applied to the timestamp output. The correction process continuously compensates for the propagation delays, ensuring that timestamps remain precise despite the centralized timing hardware location. This feedback loop resolves the contradiction between centralized timing hardware and timestamp precision.
2Measurement precision
If counters and ramps are placed in each pixel to eliminate timing errors, then timestamp precision is improved, but device size and power consumption increase significantly
Solution Approach 1:
The patent extracts the counter and ramp components from each pixel and consolidates them into a single centralized location outside the pixel array. This extraction eliminates the redundant timing hardware in each pixel, dramatically reducing power consumption and device size. The systematic errors introduced by this extraction are then corrected through characterization and lookup tables, maintaining timestamp precision without the power penalty.
Solution Approach 2:
Instead of placing physical counters and ramps in each pixel, the patent creates a copy of the timing correction data (error values and correction factors) in lookup tables associated with each pixel. This virtual copying allows each pixel to access its specific timing correction without requiring physical timing hardware, resolving the contradiction between precision and power consumption.
3Reliability
If the entire focal plane array is read out at every frame to ensure complete data capture, then no data is lost, but data bottlenecks and storage requirements increase for large format high frame rate imagers
Solution Approach 1:
The patent applies local quality by allowing different regions or pixels of the focal plane array to be read out independently based on their specific needs. Rather than forcing a uniform readout of the entire array, the system can selectively read out only the necessary portions, reducing data bottlenecks while maintaining completeness where required. This localized approach resolves the contradiction between complete data capture and efficient throughput.
Data Source
AI summary
Devices and methods of minimizing the temporal error between pixels or groups of pixels on a focal plane array involving, on a focal plane array comprising at least two pixels or groups of pixels, at least one counter or ramp, and at least one trigger: determining the timing error associated with a time stamp associated with the at least two pixels or groups of pixels; storing the timing error associated with the at least two pixels or groups of pixels and the pixel or pixel group location; and using the stored timing error and pixel or pixel group location to correct subsequent time stamps associated with the at least two pixels or groups of pixels, wherein the timing error corresponds to a systematic error between the trigger and the counter or ramp value due to the location of a pixel or group of pixels on the focal plane array.