Timestamp Adjustment Using Hardware Correction Data
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Solution Overview
Problem
Current time stamping technologies in computing and communication systems suffer from limited resolution, often providing timestamps with accuracy that is insufficient for modern high-speed systems, where events can occur within time periods shorter than the counter increment period, necessitating a more precise method to record event timing accurately.
Innovation Solution
A method and system that utilize a coarse time stamp from a counter and timing correction data from hardware components to adjust the timestamp, providing higher resolution by accounting for latency and phase offsets in the event processing hardware, thereby improving timestamp accuracy beyond the limitations of the reference clock rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the counter frequency is increased to improve timestamp resolution, then timestamp precision is improved, but device complexity and practical implementation become problematic
Solution Approach 1:
The patent introduces timing correction data as an intermediary component that mediates between the coarse timestamp counter and the final precise timestamp. This correction data, obtained from hardware components, acts as a mediator that compensates for the limited resolution of the counter without requiring the counter itself to operate at extremely high frequencies, thus resolving the contradiction between timestamp precision and device complexity
Solution Approach 2:
The patent transitions from a single-dimension approach (relying solely on counter frequency) to a two-dimension approach by adding timing correction data as a separate dimension. This allows the system to achieve high timestamp precision not by increasing counter frequency alone, but by combining coarse counter values with fine-grained correction data from hardware components, effectively adding a new dimension to the timestamping mechanism
2Device complexity
If the counter increment period is increased to simplify the system, then device complexity is reduced, but timestamp precision deteriorates because events may occur within the counter increment period
Solution Approach 1:
The patent applies preliminary action by obtaining timing correction data in advance from hardware components before the final timestamp is generated. This correction data is prepared beforehand and stored, allowing the system to compensate for events that occurred within the counter increment period without requiring the counter to operate at higher frequencies, thus maintaining simplicity while improving precision
Solution Approach 2:
The timing correction data serves as an intermediary that bridges the gap between the coarse counter increment period and the actual event timing. This intermediary component provides the fine-grained timing information needed to accurately timestamp events that occur within the counter increment period, resolving the contradiction between device complexity and timestamp precision
Data Source
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AI summary
A method of determining a time stamp for an event in a digital processing system, the method comprising the steps of: obtaining a coarse time stamp from a time stamp counter; obtaining timing correction data from one or more hardware components of the system; and adjusting the coarse time stamp value based on the timing correction data to provide a precision time stamp value.