High Accuracy Timestamp Support via Phase Measurement
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Solution Overview
Problem
Current clock synchronization protocols, such as NTP and PTP, face challenges in achieving high accuracy timestamps, particularly in networked systems where devices operate independently, leading to uncoordinated time standards.
Innovation Solution
The proposed solution involves controlling the phase relationship between outbound and local reference clock signals, measuring phase differences between data and time of day signals, and using a state machine circuit to align and measure these phases, enabling 1-bit level accuracy timestamps without external circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If NTP protocol is used for clock synchronization, then network compatibility is improved, but timestamp accuracy deteriorates to millisecond level
Solution Approach 1:
The patent introduces a phase measuring circuit as an intermediary component between the NTP protocol stack and the local reference clock. This circuit directly measures the phase difference between received timestamp signals and the local clock, providing high-precision timing information without being constrained by NTP's software-based millisecond granularity. The intermediary converts NTP's low-precision time stamps into high-precision phase measurements.
Solution Approach 2:
The patent replaces the software-based timestamping mechanism of NTP with a hardware-based phase measurement system. The phase measuring circuit uses dedicated hardware logic to directly measure phase differences at the clock edge level, achieving sub-microsecond precision. This mechanical/hardware substitution eliminates the limitations of software interrupt timing and operating system delays.
2Measurement precision
If PTP protocol with hardware timestamping is used, then timestamp accuracy is improved, but device complexity increases due to multiple messages and timestamps
Solution Approach 1:
The patent extracts only the essential timing measurement function from the complex PTP protocol sequence. Instead of implementing the full four-message PTP exchange with multiple timestamps, the system extracts the core function of measuring time of flight by comparing phase differences at the receiving end. This simplification maintains high accuracy while reducing protocol complexity.
Solution Approach 2:
The receiving device performs self-service timing measurement by using its own local reference clock to measure the phase difference of incoming signals. The phase measuring circuit autonomously captures timing information without requiring complex coordination with the transmitting device, eliminating the need for multiple synchronized timestamps and reducing overall system complexity.
3Ease of manufacture
If software-based timestamping is used, then ease of implementation is improved, but measurement precision deteriorates due to operating system delays
Solution Approach 1:
The patent replaces the software-based timestamping mechanism with a dedicated hardware phase measuring circuit. This circuit directly measures phase differences at the clock edge level using hardware logic, achieving sub-microsecond precision without being subject to operating system interrupt delays, context switching, or software processing variability. The hardware implementation maintains ease of integration while dramatically improving measurement precision.
4Measurement precision
If phase measurement circuit is added to achieve high accuracy, then timestamp accuracy is improved, but device complexity increases
Solution Approach 1:
The phase measuring circuit is designed to perform multiple functions: measuring phase differences for incoming data signals, measuring phase differences for timestamp signals, and providing timing information to the timestamp generation logic. This multi-functionality reduces the need for separate dedicated circuits for each measurement task, thereby limiting the increase in overall device complexity while achieving high timestamp accuracy.
Data Source
AI summary
Apparatus and associated methods relate to high accuracy timestamp support by controlling a first phase relationship between an outbound signal transmitted by a transmitting circuit and a local reference clock signal, measuring a second phase difference between a received data signal and the local reference signal, and measuring a third phase difference between a received time of day (RXTOD) signal and the local reference signal. In an illustrative example, a state machine circuit may be operated to control the first phase relationship, a phase measuring circuit may be configured to measure the second phase difference and the third phase difference. By comparing results obtained from phase control and phase measurement, the time of day (TOD) of each transmitted/received bit can be calculated at 1-bit level accuracy and achieve 1-bit level accuracy in the timestamp.