Gap-Compensated Timing Alignment for Stable PLL and DLL Lock

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Solution Overview

Problem

Timing alignment systems, such as delay locked loops (DLLs) and phase locked loops (PLLs), face disruptions and instability due to intentionally introduced gaps in pulse trains, leading to deviations from locked conditions and potential false locking issues when gaps are not compensated for.

Innovation Solution

Incorporating a gap detection and compensation circuit that processes loop control signals to detect gaps in reference or feedback clock signals and adjusts loop voltages, ensuring the timing alignment system remains locked or almost locked during gaps by modifying loop control signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If gaps are introduced in pulse trains for timing alignment systems, then the system can handle intermittent signals or reduce power consumption, but the timing alignment stability deteriorates and false locking issues occur

Engineering Contradiction:
Improvepower consumptionVSAvoidtiming alignment stability
Core Design Contradiction:
Use of energy by stationary objectVSStability of the object's composition

Solution Approach 1:

The gap detection circuit proactively identifies gaps in the reference or feedback clock signals before they can cause timing alignment failures. By detecting gaps in advance and triggering compensation mechanisms, the system maintains stable locking during intermittent signal conditions without requiring continuous high-power operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system employs feedback loops that monitor the timing alignment status and automatically adjust parameters when gaps are detected. The feedback mechanism ensures that timing deviations caused by gaps are corrected, maintaining stability while allowing power-saving gap intervals.

Inventive Principle:
Principle #23Feedback

2Stability of the object's composition

If gap detection and compensation circuitry is added to timing alignment systems, then timing alignment stability during gaps is improved, but device complexity increases

Engineering Contradiction:
Improvetiming alignment stabilityVSAvoidcircuit complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The gap detection functionality is merged with the existing phase detector or delay element in the timing alignment system. By combining gap detection with existing components rather than adding completely separate circuitry, the patent achieves gap compensation while minimizing the increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The phase detector or delay element is designed to serve multiple functions: normal phase comparison during continuous operation and gap detection during intermittent operation. This multi-functionality reduces the need for dedicated gap detection circuitry, thereby limiting complexity increases.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11177815B2Timing alignment systems with gap detection and compensation
Publication Date: 2021.11.16 ANALOG DEVICES INT UNLTD CO
  • US11177815B2 patent drawing
  • US11177815B2 patent drawing
  • US11177815B2 patent drawing

AI summary

Provided herein are gap detection and compensation schemes for timing alignment systems. In certain embodiments, a timing alignment system includes a detector that generates one or more loop control signals based on comparing a reference clock signal to a feedback clock signal, a loop filter having a loop voltage that is adjusted based on the one or more loop control signals, and a gap detection and compensation circuit that processes the one or more loop control signals to detect a gap in at least one of the reference clock signal or the feedback clock signal. In response to detecting the gap, the gap detection and compensation circuit modifies the one or more loop control signals to provide an adjustment to the loop voltage.