Aggregate Timing Constraint Comparison for Circuit Mismatch Detection

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Solution Overview

Problem

Conventional methods for comparing timing constraints in electronic circuits often produce false positive or false negative results due to not considering interactions between constraints, leading to incorrect reporting of mismatches or matches between circuit configurations.

Innovation Solution

A computer-implemented method that aggregates timing constraints along paths from source to sink nodes in a circuit configuration, accounting for interactions and applying precedence rules to determine equivalent aggregate sets of constraints, thereby flagging mismatches accurately.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If iterative pairwise comparison of individual constraints is used, then the comparison process is simple, but false positive and false negative results occur due to not considering interactions between constraints

Engineering Contradiction:
Improvecomparison process simplicityVSAvoidtiming constraint comparison accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent merges multiple individual timing constraints into a single aggregate constraint by combining them along timing paths. This aggregation process considers interactions between constraints by computing their combined effect on the overall timing behavior, thereby eliminating false positives and false negatives that occur when constraints are compared individually without considering their interactions.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If aggregate sets of timing constraints are determined accounting for interactions, then comparison accuracy is improved, but computational complexity increases

Engineering Contradiction:
Improvetiming constraint comparison accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the circuit into timing paths with source and sink nodes, allowing aggregate constraints to be computed and compared along each path independently. This segmentation approach reduces computational complexity by breaking down the overall comparison task into manageable path-level computations, while still capturing constraint interactions within each path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by focusing the aggregate constraint computation only on relevant timing paths between corresponding source and sink nodes, rather than analyzing all possible constraint interactions in the entire circuit. This selective approach maintains comparison accuracy for critical paths while reducing overall computational complexity.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If structural comparison of timing constraints is performed, then the method is computationally efficient, but it produces false mismatches when circuit changes alter constraint application

Engineering Contradiction:
Improvecomparison speedVSAvoidmismatch detection accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the comparison parameter from the structural form of individual constraints to the behavioral parameter of aggregate constraints along timing paths. By comparing the net timing effect of aggregated constraints rather than the structural details of individual constraints, the method remains computationally efficient while accurately detecting functional mismatches that structural comparison would miss.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8261221B2Comparing timing constraints of circuits
Publication Date: 2012.09.04 SYNOPSYS INC
  • US8261221B2 patent drawing
  • US8261221B2 patent drawing
  • US8261221B2 patent drawing

AI summary

Timing behaviors associated with constraints of circuits are compared to identify mismatches between circuit configurations. Aggregate sets of timing constraints associated with timing nodes are determined for timing paths between start points and end points. Precedence rules are applied to aggregate sets of timing constraints by applying precedence rules to interacting timing constraints. Aggregate sets of constraints for corresponding timing nodes are matched to determine if timing constraint mismatches exist between circuits. If aggregate timing constraints associated with start point, end point pairs are found to match, reconvergent points between the start point and end points are analyzed to see if aggregate constraints of timing nodes connected to reconvergent/divergent points match if timing exception matches are involved. Graph traversal algorithms allow efficient computation of aggregate timing constraints for timing nodes.