Timing Controller Bit Segmentation for Display Color Depth
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Solution Overview
Problem
High-quality color depth in display devices requires increased bit processing in data driving integrated circuits, leading to larger sizes and increased data transfer quantities between the timing controller and data driving integrated circuit, posing challenges in miniaturization and efficiency.
Innovation Solution
The implementation of a timing controller with a bit selecting unit, error calculating unit, and dithering unit that fixes specific bits of image data as pseudo control data, reducing the bit processing load on the data driving integrated circuit and maintaining color depth through dithering techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of bits of image data is increased to enhance color depth and image quality, then the color depth expressed in subpixels increases, but the size of the data driving integrated circuit increases
Solution Approach 1:
The patent segments the image data processing into two parts: the data driving integrated circuit processes only n bits of image data, while the timing controller processes the remaining m bits (where n+m equals the total color depth bits). This segmentation allows the data driving integrated circuit to use fewer bits, reducing its size, while the timing controller handles the additional bits to maintain high color depth output.
Solution Approach 2:
The patent moves part of the bit processing function from the data driving integrated circuit to the timing controller, effectively changing the dimensional distribution of processing tasks. The timing controller adds m bits of processing capability without increasing the bit width of the data driving integrated circuit, achieving high color depth through a different architectural dimension.
2Measurement precision
If the number of bits of image data is increased to implement high-quality color depth, then the color depth of 1024 gray requires 10 bits, but the size of internal components and the data driving integrated circuit increases
Solution Approach 1:
The patent divides the 10-bit processing requirement into two segments: the data driving integrated circuit handles 8 bits (n=8), and the timing controller handles the remaining 2 bits (m=2). This segmentation allows the data driving integrated circuit to use smaller internal components while the timing controller completes the 10-bit color depth through additional processing.
3Measurement precision
If the number of bits of image data is increased to enhance color depth, then the data transfer quantity between the timing controller and the data driving integrated circuit increases
Solution Approach 1:
The patent segments the data transfer into two streams: n-bit image data transferred to the data driving integrated circuit, and m-bit pseudo control data transferred separately to the data driving integrated circuit. This segmentation optimizes the data transfer by matching the bit depth to the processing capabilities of each component, reducing unnecessary data transfer quantity.
Data Source
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AI summary
A timing controller includes a bit selecting unit (141), an error calculating unit (143), and a dithering unit (145). The bit selecting unit is configured to fix an m bit data value of n + m bit input image data (Data) for a plurality of subpixels as a fixed data value, where n and m are integers. The error calculating unit is configured to calculate an error (Error Data) between the fixed data value fixed by the bit selecting unit (PC) and the m bit data value of the input image data before fixed by the bit selecting unit. The dithering unit is configured to generate n bit output image data (Data') dithered to correct the error.