Timing Controller Pulse Generation for Stable Display Blank Periods
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Solution Overview
Problem
Abnormally generated data enable signals can cause momentary display of incorrect images on flat-panel displays, reducing display quality by applying image data during intended blank periods.
Innovation Solution
A timing controller with a count control circuit, pulse width detector, and pulse generator that counts and compares pulse periods, generating output pulses with one-third the period of detected previous pulses to stabilize blank periods and prevent incorrect image display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the timing controller directly applies image data during the effective period of the data enable signal, then the display operation is simple and fast, but abnormal enable signals can cause incorrect images to be displayed during blank periods, reducing display quality
Solution Approach 1:
The patent applies preliminary action by detecting the period of the current enable signal pulse and comparing it with the period of the previous pulse before generating control signals. This advance detection and comparison allows the system to identify abnormal pulses (where period ≤ previous period) and generate appropriate blank period control signals in advance, preventing incorrect image display. The count control circuit counts clock cycles to determine pulse periods, and the period comparison circuit performs the comparison before the display operation, ensuring reliable display quality without adding complex real-time intervention mechanisms.
2Measurement precision
If the timing controller generates control signals for every pulse of the data enable signal, then the timing control is precise, but it cannot distinguish between normal and abnormal pulses, leading to incorrect image display during blank periods
Solution Approach 1:
The patent implements feedback by continuously monitoring the period of each enable signal pulse and comparing it with the previous pulse period. The period comparison circuit provides feedback when an abnormal condition is detected (current period ≤ previous period), triggering the generation of extended blank period control signals. This feedback mechanism ensures that only normal pulses with increasing periods generate standard control signals, while abnormal pulses generate corrected control signals that extend the blank period, thereby maintaining image display accuracy with precise pulse period measurement.
Data Source
AI summary
A timing controller includes a count control circuit, a pulse width detector, and a pulse generator. The count control circuit receives an external enable signal. Pulses of the external enable signal include an effective and a blank period of image data. The count control circuit counts pulse widths of each of the pulses. The pulse width detector receives the counted pulse widths, compares a pulse width of a present pulse with pulse widths of previous pulses, and detects a pulse width of a previous pulse that has a pulse width smaller than the pulse width of the present pulse. The pulse generator generates three output pulses having pulse widths that are one-third a period of the detected previous pulse. The pulse generator outputs the first, second and third pulses as an internal enable signal.