Timing Controller Chip Write Protection Voltage Monitoring

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Solution Overview

Problem

Liquid crystal display panels experience screen abnormalities due to initialization configuration code reading errors caused by unstable voltage levels, leading to reduced efficiency in production and experimentation.

Innovation Solution

A method for controlling the timing controller chip of a display panel involves generating a write protection level, detecting the actual level value, and sending comparison results to the chip to determine whether to read the initialization configuration code, disconnecting or enabling the inter-integrated circuit bus accordingly to prevent reading errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the timing controller chip reads the initialization configuration code from the memory chip, then the display panel can perform initialization configuration, but reading errors occur due to unstable voltage levels causing screen abnormalities

Engineering Contradiction:
Improvereading accuracyVSAvoidvoltage instability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by detecting the voltage level of the write protection pin before the timing controller chip reads the initialization configuration code. The detection circuit checks whether the voltage level meets the threshold requirement in advance, and only allows reading when the voltage is stable and sufficient, thereby preventing reading errors caused by unstable voltage

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using a detection circuit to continuously monitor the write protection pin voltage level and provide feedback signals to the timing controller chip. When the voltage level is abnormal, the detection circuit sends a feedback signal to prevent the reading operation, forming a closed-loop control that ensures reading only occurs under stable voltage conditions

Inventive Principle:
Principle #23Feedback

2Reliability

If a detection circuit is added to monitor the write protection pin voltage level, then reading errors are prevented, but the device complexity increases

Engineering Contradiction:
Improveinitialization configuration accuracyVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies merging by integrating the detection circuit functionality into the existing timing controller chip and memory chip system. The detection circuit shares the write protection pin resource with the memory chip's write protection mechanism, and the detection results are directly used by the timing controller chip's reading control logic, thereby adding minimal external components while achieving reliable voltage monitoring

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The detection circuit is designed with multi-functionality, serving both to monitor the write protection pin voltage level for reading error prevention and to provide control signals for the timing controller chip's reading operation. This universal design allows a single circuit to perform multiple functions, reducing the need for additional dedicated components and minimizing system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11636815B2Method for controlling timing controller chip of display panel, and display panel
Publication Date: 2023.04.25 HKC CORP LTD
  • US11636815B2 patent drawing
  • US11636815B2 patent drawing

AI summary

This application discloses a method for controlling a timing controller chip of a display panel and the display panel. The method includes steps of: outputting a write protection level to a write protection pin; detecting an actual level value of the write protection pin; and controlling whether to read an initialization configuration code according to a comparison result of the actual level value with the write protection level.