Timing Controller Interlaced Scanning Eliminates Data Storage

Solution Overview

Problem

Conventional display devices require a data storage unit and hardware components for interlaced-to-progressive format conversion, occupying space and increasing costs due to the need for buffering interlaced video signals.

Innovation Solution

A display device with a timing controller that generates specific gate and data control signals to enable interlaced scanning directly, eliminating the need for a data storage unit by using a gate drive circuit to manage odd and even field signals independently, allowing for interlaced image display without additional hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a data storage unit and hardware components are used for interlaced-to-progressive format conversion, then compatibility with interlaced format signals is achieved, but device space is occupied and cost increases

Engineering Contradiction:

Improvecompatibility with interlaced formatVSAvoiddevice space

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent extracts and removes the data storage unit from the format conversion system. By using the existing frame memory of the display panel to store odd-field and even-field signals separately, the dedicated data storage unit for format conversion is eliminated, thereby reducing device space while maintaining interlaced format compatibility

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes the frame memory serve multiple functions: it stores display data for normal progressive scanning and simultaneously stores odd-field and even-field signals for interlaced scanning. This multi-functionality eliminates the need for separate data storage units, reducing both space and cost while maintaining compatibility with both scanning formats

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a data storage unit and hardware components are used for interlaced-to-progressive format conversion, then compatibility with interlaced format signals is achieved, but device cost increases

Engineering Contradiction:

Improvecompatibility with interlaced formatVSAvoiddevice cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent makes the frame memory serve multiple functions: it stores display data for normal progressive scanning and simultaneously stores odd-field and even-field signals for interlaced scanning. This multi-functionality eliminates the need for separate data storage units, reducing both space and cost while maintaining compatibility with both scanning formats

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the format conversion function with the existing frame memory and drive circuits. By combining these functions into existing components rather than adding separate hardware, the device cost is reduced while maintaining interlaced format compatibility

Inventive Principle:

Principle #5Merging (Combining)

3Adaptability or versatility

If conventional format converter is used, then interlaced format compatibility is achieved, but additional storage and periphery auxiliary circuit are required

Engineering Contradiction:

Improveinterlaced format compatibilityVSAvoidcircuit complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the format conversion function with the existing frame memory and drive circuits. The control circuit generates control signals to direct the frame memory to output odd-field or even-field signals based on the scanning mode, combining format conversion with existing components and eliminating the need for separate conversion hardware

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts and removes the data storage unit from the format conversion system. By using the existing frame memory of the display panel to store odd-field and even-field signals separately, the dedicated data storage unit for format conversion is eliminated, thereby reducing device space while maintaining interlaced format compatibility

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS9613580B2Display device, timing controller, and image displaying method

Publication Date: 2017.04.04 MAXELL LTD

AI summary

Aspects of the present invention relate to a display device, a timing controller, and an image display method. When a frame of an input image signal including an odd-field signal and an even-field signal is received, a timing controller outputs a gate scanning clock (GCK) signal and an output enable (OE) signal in an interlaced scanning manner, to separately scan the odd-field image and the even-field image in the interlaced scanning manner in real time. The interlaced scanning manner is used for the interlaced signal, thereby saving a storage equipped in a converter.