Timing Controller Preloading for Faster Line Data Access
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing timing controllers face performance degradation due to storage memory entering energy-saving modes when signals are not received for a certain period, leading to boot time delays.
Innovation Solution
A method and timing controller that preload next line data into a shared memory different from the current data storage, preventing the storage memory from entering energy-saving modes and ensuring continuous data processing, thereby shortening boot times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the timing controller waits for signals from the processor before loading data, then power consumption is reduced, but boot time increases and performance degrades
Solution Approach 1:
The controller loads line data into shared memory in advance before the processor requests it. Specifically, the controller receives a request signal and address signal from the processor, then proactively loads the corresponding line data from storage memory into the shared memory buffer, and only then notifies the processor that the data is ready. This preliminary action ensures data is available immediately when needed, preventing boot time delays while maintaining power efficiency.
Solution Approach 2:
The controller continuously monitors for request signals from the processor and maintains a ready state for data transmission. By keeping the data loading process continuous and responsive rather than idle-waiting, the system maintains performance without excessive power consumption. The controller is always prepared to load data immediately upon receiving a request, ensuring continuous useful action.
2Use of energy by moving object
If the storage memory enters energy-saving mode when signals are not received, then power consumption decreases, but data access speed deteriorates
Solution Approach 1:
The controller performs preliminary data loading from storage memory into shared memory before the processor needs the data. This advance preparation ensures that when the processor does request data, it can be retrieved immediately from the shared memory buffer rather than from slow storage memory, thus maintaining high data access speed while allowing the storage memory to enter low-power states between operations.
3Use of energy by moving object
If data is loaded sequentially from storage memory to shared memory, then power consumption is minimized, but processing speed decreases
Solution Approach 1:
The controller loads line data into shared memory in advance upon receiving a request signal, before the processor actually needs to process the data. This preliminary loading action allows the system to minimize power consumption during idle periods while ensuring that data is ready for immediate processing when needed, thus improving processing speed without significantly increasing power consumption.
Data Source
AI summary
A timing controller and a method of driving a timing controller are disclosed. A method of driving a timing controller according to an exemplary embodiment includes receiving, by a controller, a first request signal requesting loading of line data from a processor, receiving, by the controller, a first address signal for the line data that is loaded together with the first request signal and a second address signal, and loading, by the controller, first line data corresponding to the first address signal into a first shared memory in response to the first request signal, notifying the processor of a completion of loading of the first line data, and then loading second line data corresponding to the second address signal into a second shared memory.