Timing Controller Multiplexing Control Signals in Display Data Transmission
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Solution Overview
Problem
Existing display devices face inefficiencies in data transmission due to high overhead in synchronization and protocol signals, leading to reduced data transmission rates and increased costs from additional transmission channels and increased pin/pad counts.
Innovation Solution
A display device with a timing controller that generates an internal clock signal to transmit synchronization and protocol signals, allowing these signals to be recovered and used to drive image data without requiring additional transmission channels, utilizing pulse width modulation to integrate these signals with image data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronization and protocol signals are transmitted through separate transmission channels, then signal transmission reliability is improved, but device complexity and transmission channel requirements increase
Solution Approach 1:
The patent combines synchronization signals and protocol signals with image data into a single transmission channel by encoding them together. The timing controller multiplexes these control signals with image data bits, allowing them to share the same LVDS transmission channel without requiring separate channels, thus reducing device complexity while maintaining transmission reliability
Solution Approach 2:
The transmission channel is designed to serve multiple functions simultaneously: it transmits both image data and control signals (synchronization and protocol signals) through the same LVDS interface. This multi-functionality eliminates the need for dedicated separate channels for control signals, reducing overall system complexity
2Reliability
If overhead bits are added to transmit control signals, then signal transmission completeness is improved, but data transmission rate deteriorates
Solution Approach 1:
The patent merges control signals with image data into the same transmission stream. By multiplexing synchronization and protocol signals with image data bits in the time domain, the system achieves complete signal transmission without adding separate overhead channels, thereby maintaining high data transmission rates
Solution Approach 2:
The timing controller uses periodic timing information to multiplex control signals with image data. By utilizing the periodic nature of display scanning and inserting control signals at appropriate time intervals within the existing data stream, the system ensures complete signal transmission while maintaining the original data transmission rate
3Reliability
If additional transmission channels are used for control signals, then signal transmission reliability is improved, but manufacturing cost increases
Solution Approach 1:
The patent merges multiple functions (image data transmission and control signal transmission) into a single LVDS transmission channel. This eliminates the need for additional physical channels, reducing the number of required IC pins and pads, thereby lowering manufacturing costs while maintaining reliable signal transmission
Solution Approach 2:
The LVDS transmission channel is designed to perform multiple functions simultaneously, serving as both an image data channel and a control signal channel. This multi-functionality reduces the total component count and IC complexity, directly reducing manufacturing costs
Data Source
AI summary
A display device is provided. The display device includes: a timing controller and a data driver. The timing controller is configured to receive input data, a main clock signal, a synchronization signal, or a protocol signal, to generate an internal clock signal by using the main clock signal, to convert the input data into image data, and to transmit the synchronization signal or the protocol signal using the internal clock signal. The data driver is configured to recover the synchronization signal or the protocol signal from the internal clock signal, and to drive the image data by using the recovered synchronization signal or the protocol signal.