Timing Controller Adjusts Pulse Width for Display Charge Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As display devices increase in size and resolution, the RC delay in data lines leads to charge deviation between positions, causing luminance deviations due to parasitic capacitances being charged at different rates, making it difficult to maintain uniform image quality.
Innovation Solution
A display device with a timing controller that adjusts the pulse width of the output data enable signal based on a charge time graph, increasing the low period of the source output enable signal as the horizontal pixel line is farther from the source driver, ensuring consistent data charge across the display panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the size and resolution of the display device are increased, then the display quality is improved, but the RC delay in data lines increases causing charge deviation between positions
Solution Approach 1:
The patent applies local quality by adjusting the data output period based on the position of horizontal pixel lines. Specifically, the timing controller sets different data output periods for different regions: a first data output period for pixel lines in a first region and a second data output period (longer than the first) for pixel lines in a second region. This positional differentiation compensates for the RC delay that increases with distance from the source driver, ensuring uniform charge levels across the entire display panel despite the large size and high resolution.
2Area of stationary object
If the data lines are made longer to accommodate larger display sizes, then the display area is increased, but the charge deviation between positions increases due to RC delay
Solution Approach 1:
The patent changes the temporal parameter (data output period) to compensate for the spatial parameter (data line length). The timing controller dynamically adjusts the data output period based on the position of each horizontal pixel line, extending the period for lines farther from the source driver. This parameter adjustment compensates for the increased RC delay in longer data lines, maintaining uniform charge levels across the expanded display area.
3Manufacturing precision
If the resolution is increased to improve image quality, then the detail quality is improved, but the time to charge data lines is reduced causing charge deviation
Solution Approach 1:
The patent introduces dynamic adjustment of the data output period based on position. Rather than using a fixed timing for all pixel lines, the timing controller dynamically sets different data output periods for different horizontal pixel lines. This dynamic timing adjustment ensures that each line receives adequate charging time despite the reduced overall time available due to high resolution requirements, preventing charge deviation while maintaining the high resolution image quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces data charge deviation between positions, preventing luminance deviations and maintaining image quality by adjusting the data output period in accordance with the RC delay, ensuring uniform charging across the display panel.
Implementation Method 1
a charge deviation phenomenon resulting from an RC delay of the data lines increases
Implementation Method 2
when parasitic capacitances of the data lines increase due to an increase in the size and the resolution of the display device
Data Source
AI summary
A display device includes a display panel including data lines, a source driver positioned at one side of the display panel, and a timing controller which sequentially stores digital video data in a plurality of line memories, starts to generate an output data enable signal in conformity with a first writing start timing of a last line memory of the line memories, adjusts a pulse width of the output data enable signal of each horizontal pixel line based on a previously determined charge time graph, reads out the digital video data from the line memories in synchronization with rising edges of the output data enable signal, and generates a source output enable signal having the same pulse width each time each line memory finishes reading out the data.


