Timing Controller Signal Transmission During Scan Downtime

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Solution Overview

Problem

Display devices face challenges in efficiently supplying signals to memory transmission lines during periods when scan control signals are not supplied to scan control lines, leading to potential signal quality issues and limitations in real-time display mode changes.

Innovation Solution

A timing controller is designed to include a data transmitter, scan controller, memory interface, and interface control signal generator, which transmits interface control signals during the mode period when scan start and scan clock signals are not supplied, allowing the memory interface to operate and enabling real-time display mode changes by receiving mode data from a control memory through memory transmission lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If scan control signals are supplied continuously to scan control lines, then scan driver operation is maintained, but memory transmission lines cannot receive signals during active scanning periods

Engineering Contradiction:
Improvesignal transmission reliabilityVSAvoidtime for mode data transmission
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent utilizes the periodic nature of display scanning by transmitting mode data during vertical blanking intervals (VBI) when scan control signals are not supplied to scan control lines. This periodic transmission window allows memory interface operations to occur without interfering with active scan operations, effectively resolving the contradiction between maintaining scan driver operation and enabling mode data transmission.

Inventive Principle:
Principle #19Periodic action

2Productivity

If memory interface operates during active scan periods, then mode data can be transmitted, but signal quality deteriorates due to interference with scan control signals

Engineering Contradiction:
Improvemode data transmission efficiencyVSAvoidsignal interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a control signal generation unit that produces interface control signals based on the timing of scan control signals. This intermediary control mechanism coordinates the operation of the memory interface with the scan driver, ensuring that mode data transmission occurs during periods when scan control lines are inactive, thereby avoiding signal interference while maintaining transmission efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If display mode changes are implemented in real-time, then user responsiveness is improved, but signal transmission stability is compromised

Engineering Contradiction:
Improvereal-time display mode change capabilityVSAvoidsignal transmission stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent prepares mode data in advance during vertical blanking intervals before the actual mode change is needed. By pre-loading and validating mode data during periods when display scanning is not actively updating, the system ensures that mode changes can be executed immediately when required without compromising signal transmission stability during active display periods.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11004396B2Timing controller and display device including the same
Publication Date: 2021.05.11 SAMSUNG DISPLAY CO LTD
  • US11004396B2 patent drawing
  • US11004396B2 patent drawing
  • US11004396B2 patent drawing

AI summary

A timing controller includes: a data transmitter which transmits image data and a frame control signal to a data driver; a scan controller which transmits a scan start signal and a scan clock signal through scan control lines; and a memory interface which receives mode data from a control memory through a memory transmission line during a mode period, where the mode period is a period in which the scan controller does not transmit the scan start signal and the scan clock signal to the scan control lines.