Timing Controller Variable Frequency Clock Signal EMI Reduction

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Solution Overview

Problem

Current methods for reducing electromagnetic interference (EMI) in high-power LCD TV power supply circuits, such as RC buffer circuits, are ineffective, leading to significant radiation interference as TV sizes and resolutions increase.

Innovation Solution

A driving method that uses a timing controller chip to generate a variable-frequency clock signal, which is then frequency multiplied to create an external internal clock signal for the power supply chip circuit, dispersing radiation energy across different frequency bands and reducing EMI.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If RC buffer circuit is used to reduce electromagnetic interference, then low-power circuit EMI is reduced, but it is ineffective for high-power circuits

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidapplicability to high-power circuits
Core Design Contradiction:
Object-affected harmful factorsVSAdaptability or versatility

Solution Approach 1:

The patent changes the frequency parameter of the clock signal from fixed to variable. By making the clock signal frequency variable, the power supply switching frequency varies accordingly, which disperses the electromagnetic radiation energy across different frequency bands. This resolves the limitation of RC buffer circuits that only work for low-power circuits by making the solution effective for high-power circuits as well.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If electromagnetic interference suppression component is added to power supply output, then conduction interference is weakened, but radiation interference cannot be overcome

Engineering Contradiction:
Improveconduction interferenceVSAvoidradiation interference
Core Design Contradiction:
Object-affected harmful factorsVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful concentrated radiation into a beneficial dispersed radiation pattern. By using variable frequency clock signals, the electromagnetic radiation that would normally be concentrated at a single frequency is instead distributed across multiple frequency bands. This transforms the harmful focused EMI into a less harmful dispersed radiation pattern that is easier to shield and manage.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Stability of the object's composition

If fixed frequency clock signal is used in power supply chip circuit, then circuit operation is stable, but electromagnetic radiation is concentrated at specific frequency

Engineering Contradiction:
Improvecircuit operation stabilityVSAvoidelectromagnetic radiation concentration
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The patent introduces dynamics into the previously static clock signal frequency. Instead of using a fixed frequency clock signal that causes concentrated electromagnetic radiation, the system now uses a variable frequency clock signal that changes over time. This dynamic approach maintains circuit operation stability while dispersing the electromagnetic radiation across different frequency bands, preventing concentration at any single frequency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11200863B2Driving method of display panel, driving device and display device
Publication Date: 2021.12.14 HKC CORP LTD
  • US11200863B2 patent drawing
  • US11200863B2 patent drawing
  • US11200863B2 patent drawing

AI summary

A driving method of a display panel includes the steps of: using a timing controller chip to receive a first data signal of a control board; using the timing controller chip to convert the first data signal into a second data signal; using the timing controller chip to generate a variable-frequency first clock signal, and to transmit the second data signal and the first clock signal to a source driving chip; and using the timing controller chip to obtain the first clock signal and generate a second clock signal by frequency multiplication, the second clock signal being a preset multiple of that of the first clock signal; wherein the second clock signal serves as an internal clock signal of a power supply chip circuit, and the second clock signal is inputted to the power supply chip circuit.