Timing Device Counter Bit Shifting for 1/1000-Second Precision

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing timing devices struggle to perform timing actions on a 1/1000-second basis without increasing circuit complexity or power consumption, and achieve accurate time stamping of events.

Innovation Solution

A timing device with a counter generating 6-bit count values for 1/100-second timing and an output control circuit shifting upper bits to produce 4-bit timed data for 1/1000-second timing, using a clock signal frequency of 212 Hz and a count control circuit to manage state transitions and carry signals, allowing for simple circuit configuration with minimal power increase.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a clock signal with frequency higher than 4096 Hz is used for 1/1000-second timing, then timing precision is improved, but power consumption increases

Engineering Contradiction:
Improvetiming precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent segments the timing function into two parts: a counter operating at 4096 Hz for 1/100-second timing, and a bit-shifting operation that extracts upper 4 bits to represent 1/1000-second timing. This segmentation allows achieving 1/1000-second timing precision without using a high-frequency clock signal, thus avoiding increased power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a virtual representation of high-frequency timing data by copying and repositioning bits from the lower-frequency counter output. The upper 4 bits of the 6-bit count value are extracted and used as 4-bit timed data representing 1/1000-second timing, effectively creating a timing signal at the desired resolution without generating actual high-frequency pulses.

Inventive Principle:
Principle #26Copying

2Measurement precision

If a complicated counting condition is used for 1/1000-second timing, then timing precision is improved, but device complexity increases

Engineering Contradiction:
Improvetiming precisionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the necessary information from the counter output to achieve the timing function. By taking out the upper 4 bits from the 6-bit count value, the system obtains sufficient data for 1/1000-second timing without implementing a complete high-frequency counter, thereby simplifying the circuit.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces dynamic control through the count control circuit that selectively changes the counting condition based on the current count value. When the count value reaches a predetermined value, the counting condition changes, allowing the system to adapt its operation to maintain timing accuracy while using a simple circuit structure.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If accurate time stamp data for events is required, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvetime stamp accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent prepares the timing data in advance by continuously generating and holding the 4-bit timed data representing 1/1000-second timing in the output circuit. When an event occurs, the event detection circuit can immediately capture this pre-prepared timing data without requiring complex arbitration or data synchronization mechanisms, thus achieving accurate time stamping with simple circuitry.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10379571B2Timing device, electronic apparatus, and moving object
Publication Date: 2019.08.13 SEIKO EPSON CORP
  • US10379571B2 patent drawing
  • US10379571B2 patent drawing
  • US10379571B2 patent drawing

AI summary

A timing device includes a counter that performs counting action in synchronization with pulses in a clock signal to generate a 6-bit count value representing decimal numbers “0” to “39” in each count cycle in order to perform counting action on a 1/100-second basis and an output control circuit that outputs upper 4 bits of the count value generated by the counter as 4-bit timed data representing time on a 1/1000-second basis.