Timing Device Trigger Signal Deserializer Mass Spectrometer

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Solution Overview

Problem

Modern TOF mass spectrometers, particularly MALDI TOF mass spectrometers, face challenges in generating control data with high-precision delays and stabilizing power supplies due to high repetition rates of solid-state lasers and increasing clock speeds, leading to noise in mass spectrum data and complexity in timing electronics.

Innovation Solution

A trigger signal deserialiser is used to convert serial trigger signal data into parallel data, allowing for improved time resolution without the need for fast processing circuitry, and a processing means is employed to produce control data synchronised to the trigger event, reducing jitter and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high repetition rates of solid-state lasers and increasing clock speeds of digital electronics are used, then productivity and measurement precision are improved, but device complexity and noise increase

Engineering Contradiction:
Improverepetition rateVSAvoidtiming electronics complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the high-speed serial trigger signal into parallel data streams using a deserialiser. This allows the timing device to process multiple bits simultaneously at lower clock speeds, reducing the complexity of timing electronics while maintaining high repetition rate capability. The serial-to-parallel conversion divides the high-speed signal processing into manageable parallel channels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a deserialiser as an intermediary component between the high-speed serial trigger signal input and the parallel processing stages. This intermediary device converts the high-speed serial data into parallel form, enabling subsequent processing at lower clock speeds and reducing overall system complexity while preserving the high repetition rate functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If high-speed processing circuitry is used to process trigger signals, then time resolution is improved, but device complexity and noise increase

Engineering Contradiction:
Improvetime resolutionVSAvoidprocessing circuitry complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Instead of processing the trigger signal serially at high speed, the patent inverts the approach by converting it to parallel data. This allows timing processing to occur at lower clock speeds using simpler circuitry, while the parallel architecture maintains the required time resolution. The inversion from serial high-speed processing to parallel lower-speed processing reduces complexity.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent transitions from one-dimensional serial processing to two-dimensional parallel processing. By converting the serial trigger signal into parallel data streams, the system can process multiple bits simultaneously across multiple channels, achieving the required time resolution with less complex circuitry operating at lower clock speeds.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If serial trigger signal data is processed directly, then device complexity is reduced, but time resolution deteriorates

Engineering Contradiction:
Improveprocessing complexityVSAvoidtime resolution
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent segments the serial trigger signal data into parallel components using a deserialiser. This segmentation allows the timing device to process multiple bits simultaneously, improving time resolution while keeping the processing complexity manageable through parallel architecture rather than requiring extremely high clock speeds.

Inventive Principle:
Principle #1Segmentation

4Productivity

If high clock speeds are used for digital electronics, then productivity is improved, but noise and instability increase

Engineering Contradiction:
Improveclock speedVSAvoidpower supply stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic clock domain separation by operating the deserialiser at high clock speeds for efficient data processing, while the parallel processing stages operate at lower clock speeds. This dynamic approach allows the system to achieve high productivity where needed while maintaining power supply stability and reducing noise in the processing stages.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent segments the clock domains into high-speed and low-speed regions. The deserialiser operates at high clock speeds to efficiently handle the incoming serial trigger signal, while the subsequent parallel processing operates at lower clock speeds, reducing noise and improving power supply stability without sacrificing overall productivity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP2668659B1Timing device and method in a mass spectrometer
Publication Date: 2016.08.10 KRATOS ANALYTICAL
  • EP2668659B1 patent drawingFigure 1~2
  • EP2668659B1 patent drawingFigure 3~4a
  • EP2668659B1 patent drawingFigure 4b~4c

AI summary

The present invention provides a timing device, especially a timing device for use in mass spectrometers, for example TOF mass spectrometers, for processing trigger signal data containing a trigger signal indicating the occurrence of a trigger event, the timing device having: a trigger signal deserialiser configured to receive trigger signal data containing a trigger signal indicating the occurrence of a trigger event as serial data and to output the trigger signal data as parallel data, and wherein suitably the timing device has a processing means configured to process trigger signal data outputted by the trigger signal deserialiser as parallel data.