Timing Diagram Editing for Intuitive Hardware Verification
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Solution Overview
Problem
Conventional technologies for logic verification of hardware modules require specialized skills to write and read mathematical protocol descriptions, making it difficult for users without such skills to design effectively and leading to prolonged design periods.
Innovation Solution
A timing diagram editing program and apparatus that accepts numerical information for waveform repetition in a timing diagram, determines the repetition number, and displays a continuous waveform image, allowing users to intuitively input and visualize protocol definitions without needing advanced mathematical expertise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If mathematical protocol description is used for automatic verification environment generation, then verification efficiency is improved, but user accessibility deteriorates due to specialized skill requirements
Solution Approach 1:
The patent introduces a timing diagram as an intermediary between the user and the mathematical protocol description. The timing diagram serves as a visual mediator that users can create intuitively, which then gets automatically converted into formal mathematical descriptions for verification. This resolves the contradiction by allowing users to work with intuitive graphics while still achieving the benefits of formal mathematical verification.
Solution Approach 2:
The patent replaces the manual mechanical process of writing mathematical protocol descriptions with an automated system. The timing diagram editing tool automatically generates the mathematical descriptions from visual inputs, substituting the manual mathematical writing process with automated conversion, thereby improving productivity without requiring users to learn mathematical protocols.
2Ease of operation
If conventional timing diagram editing is used, then ease of operation is improved, but design period is prolonged due to inability to generate verification environments
Solution Approach 1:
The patent makes the timing diagram editing tool multi-functional by integrating two capabilities: (1) intuitive timing diagram creation and editing, and (2) automatic generation of verification environments. This universal tool eliminates the need for separate processes and tools, allowing users to complete both tasks within a single system, thereby reducing the design period while maintaining ease of operation.
Solution Approach 2:
The patent performs preliminary action by automatically generating the verification environment during the timing diagram creation process itself, rather than requiring a separate subsequent step. The verification environment is prepared in advance as part of the diagram editing workflow, which shortens the overall design period without adding complexity to the user's operations.
3Manufacturing precision
If manual mathematical protocol description writing is required, then protocol description precision is improved, but device complexity increases due to specialized knowledge requirements
Solution Approach 1:
The timing diagram serves as an intermediary that simplifies the interface between users and the complex mathematical protocol descriptions. Users interact with the simple visual diagramming interface while the system handles the complex mathematical generation in the background, thereby maintaining precision without increasing the perceived complexity for users.
Solution Approach 2:
The system performs self-service by automatically generating the mathematical protocol descriptions from the timing diagrams without requiring user intervention or specialized knowledge. The complexity of mathematical description generation is handled autonomously by the system, maintaining precision while keeping the user interface simple and accessible.
Data Source
AI summary
A timing diagram is displayed on GUI of a timing diagram editing apparatus. Numerical information indicating the repetition number for which a waveform image within the arbitrary number of clocks is repeated is received, and the repetition number is determined based on the numerical information. A sequence image is displayed on GUI by replaying the waveform image with a continuous waveform image that is formed by repeating the waveform image for the determined repetition number of times.