Timing Irregularity Extraction and Injection for DUT Testing
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Solution Overview
Problem
The incompatibility between event-based simulation test data and cycle-based test data formats, particularly for high-speed serial devices with internal clock recovery systems, makes it difficult to generate accurate test vectors that account for timing irregularities such as jitter and drift, which are essential for testing clock recovery circuitry and loopback functionality.
Innovation Solution
A method and apparatus that extract and inject timing irregularities from event-based simulation test data into cycle-based test data, allowing for the generation of 'clean' test patterns with fixed device cycles and enabling the reinjection of these irregularities during testing, using a normalization function and timing irregularities injection tool within the translator tool and tester.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If event-based simulation test data is used, then testing accuracy for timing irregularities is improved, but compatibility with cycle-based ATE systems deteriorates
Solution Approach 1:
The patent introduces a translator tool as an intermediary component that converts event-based simulation test data into cycle-based test data format. This translator includes a cyclization engine that processes the event-based data and transforms it into the required cycle-based format, enabling compatibility between the two systems while preserving the timing irregularity information for accurate testing
Solution Approach 2:
The patent changes the data format parameters from event-based representation to cycle-based representation. The cyclization engine transforms the timing parameters and data structure to match the cycle-based format requirements of ATE systems, while maintaining the essential timing irregularity characteristics through normalization functions
2Adaptability or versatility
If fixed device cycles are imposed on event-based data, then ATE compatibility is improved, but timing irregularity information is lost
Solution Approach 1:
The patent segments the timing irregularity information from the main data stream and processes it separately through normalization functions. This allows the fixed cycle structure to be imposed on the data format while preserving the timing irregularity characteristics in a separate representation that can be applied during testing
Solution Approach 2:
The translator tool acts as an intermediary that maintains timing irregularity information throughout the conversion process. The cyclization engine and normalization functions work together to preserve this information in the transformed cycle-based data, preventing information loss during the format conversion
3Ease of operation
If timing irregularities are not injected into test patterns, then test simplicity is improved, but clock recovery circuitry testing effectiveness deteriorates
Solution Approach 1:
The patent applies preliminary action by injecting timing irregularities into the test patterns before they are applied to the device under test. The timing irregularity injection tool prepares the test data in advance with realistic timing variations, ensuring that the clock recovery circuitry is properly tested without requiring complex real-time manipulation during testing
Data Source
AI summary
A method for injecting timing irregularities into test patterns self-generated by a device under test (DUT) includes obtaining timing irregularities, receiving the test patterns generated by the device under test driven from output drivers of the DUT, injecting the timing irregularities into the test patterns to generate test patterns with timing irregularities injected therein, and applying the test patterns with timing irregularities injected therein to input receivers of the DUT. A tester is configured to test loopback functionality of a device under test (DUT) utilizing a timing irregularities injection apparatus which receives timing irregularity data readable by the tester and test data generated by the DUT, and injects the timing irregularity data into the test data for application to the DUT.