Timing Recovery Lock Detection Using Phase Pulse Difference

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Solution Overview

Problem

Existing timing recovery methods in signal receiving circuits face challenges in determining the timing lock state due to errors caused by mean square error thresholds and non-linear phase error characteristics, leading to potential false-lock conditions and lack of robustness.

Innovation Solution

A timing lock identification method that generates first and second phase adjustment pulses to adjust the oscillator phase, determining the timing recovery lock state based on the difference between the number of these pulses within a detection window, enhancing identification efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If mean square error threshold method is used for timing lock determination, then the determination can be made based on error metrics, but errors in determination result occur due to threshold setting sensitivity

Engineering Contradiction:
Improvetiming lock determination accuracyVSAvoidrobustness of determination
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent changes the determination parameter from mean square error (continuous value sensitive to threshold) to phase adjustment pulse count difference (discrete count-based metric). This parameter transformation eliminates threshold sensitivity and provides more stable, reliable timing lock determination without sacrificing measurement precision.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If S-curve phase error discrimination is used for timing lock determination, then phase error characteristics can be utilized, but false-lock occurs due to non-linear interval

Engineering Contradiction:
Improvephase error detection capabilityVSAvoidfalse-lock resistance
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent extracts only the essential information (phase adjustment pulse count difference) from the complex S-curve phase error discrimination process. By taking out just the count difference metric and discarding the non-linear S-curve characteristics, the system achieves reliable timing lock determination without false-lock while preserving the core phase error detection capability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If traditional timing recovery methods are used, then timing recovery operations can be performed, but identification efficiency of timing lock state is insufficient

Engineering Contradiction:
Improvetiming recovery functionalityVSAvoididentification efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces the complex analytical determination process (mechanical/computational analysis of MSE or S-curve) with a simpler counting and comparison process. This substitution dramatically improves identification efficiency while maintaining reliable timing recovery functionality, as counting pulses is computationally much less intensive than continuous error analysis.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10708038B2Timing lock identification method for timing recovery and signal receiving circuit
Publication Date: 2020.07.07 ALI CORP
  • US10708038B2 patent drawing
  • US10708038B2 patent drawing
  • US10708038B2 patent drawing

AI summary

A timing lock identification method is provided according to an embodiment of the disclosure. The method includes: generating one or more first phase adjustment pulses and one or more second phase adjustment pulses by a timing recovery circuit, where the one or more first phase adjustment pulses are configured to increase a phase of an output signal of an oscillator, and the one or more second phase adjustment pulses are configured to decrease the phase of the output signal; and obtaining a difference value between the number of the one or more first phase adjustment pulses and the number of the one or more second phase adjustment pulses in a detection window and determining whether the timing recovery circuit reaches a locking state of timing recovery according to the difference value. Furthermore, a signal receiving circuit is provided according to an embodiment of the disclosure.