Timing Optimization Using Output Slew Constraints

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Solution Overview

Problem

Existing timing optimization methods for integrated circuits often lead to over-optimization of candidate target cells, resulting in increased area and power consumption, which can limit the frequency boost for the entire circuit due to resource wastage and uneven optimization across cells.

Innovation Solution

A timing optimization method and apparatus based on output transition constraints, using dual thresholds for output slew and delay boost ratio to constrain and optimize candidate target cells, ensuring equalized optimization and avoiding over-optimization, thereby achieving optimal frequency and power compromise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If timing optimization is performed by continuously increasing the area of library cells to minimize delay, then the delay of candidate target cells is improved, but the area and power consumption increase excessively

Engineering Contradiction:
Improvetiming delayVSAvoidchip area
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

The patent changes the optimization parameter from area to output transition (slew rate). Instead of continuously increasing cell area to minimize delay, the method constrains the output transition within a specific range and optimizes delay based on this constraint, thereby avoiding excessive area growth while achieving timing improvement

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies different optimization strategies to different candidate target cells based on their specific characteristics. By evaluating the output transition and delay of each cell individually and applying constraints selectively, the method achieves local optimization without uniformly increasing the area of all cells

Inventive Principle:
Principle #3Local quality

2Speed

If timing optimization is performed by continuously increasing the area of library cells to minimize delay, then the delay of candidate target cells is improved, but the power consumption increases

Engineering Contradiction:
Improvetiming delayVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent changes the optimization parameter from area to output transition (slew rate). By constraining the output transition within a specific range and optimizing delay based on this constraint, the method avoids excessive area growth which directly reduces power consumption while still achieving timing improvement

Inventive Principle:
Principle #35Parameter changes

3Speed

If over-optimization is performed on part of candidate target cells, then the area of those cells is reduced, but other candidate target cells cannot obtain frequency boost

Engineering Contradiction:
ImprovefrequencyVSAvoidoverall circuit frequency
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent applies uniform output transition constraints to all candidate target cells, creating an equipotential optimization environment. By constraining the output transition of each cell within the same range, the method ensures that all cells have equal opportunity for frequency improvement, preventing any single cell from monopolizing the area resource and blocking others from achieving their potential

Inventive Principle:
Principle #12Equipotentiality

Data Source

PatentUS20240143879A1Timing optimization method and apparatus based on output transition constraints, and computer device
Publication Date: 2024.05.02 ZHENGXINYUAN TECH (HANGZHOU) CO LTD
  • US20240143879A1 patent drawing
  • US20240143879A1 patent drawing
  • US20240143879A1 patent drawing

AI summary

A timing optimization method and apparatus based on output transition constraints, and a computer device. The method includes upon acquisition of all candidate target cells, performing timing optimization on each candidate target cell. The timing optimization includes: updating the candidate target cell to increase an area of the candidate target cell; performing timing analysis on a path where the updated candidate target cell is located, and acquiring updated timing parameters; determining whether output slew of the updated candidate target cell is less than a preset output slew threshold; if the output slew is less than the preset output slew threshold, ending optimization of the current candidate target cell, otherwise, determining whether a delay boost ratio of the updated candidate target cell is less than a delay boost ratio threshold.