Separate Timing Package Layout for Low-Noise Clock Signal Routing
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Solution Overview
Problem
In electronic devices, the increasing complexity and variety of operations require managing noise in timing circuitry, particularly due to excessive length and exposure to radiated noise in electrical traces on printed circuit boards (PCBs), which can distort clock signals and affect the operation of integrated circuit (IC) packages.
Innovation Solution
A separate timing package is employed, electrically coupled to the IC package but independent of the PCB, reducing the length of clock signal traces and increasing separation from noise-emitting components, thereby isolating clock signals from radiated noise and simplifying routing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock signal traces are routed on the PCB to connect timing circuitry to IC packages, then electrical connection is established, but the traces become excessively long and exposed to radiated noise causing signal distortion
Solution Approach 1:
The patent segments the timing circuitry from the main PCB by placing it in a separate integrated circuit package. This division isolates the clock signal generation and distribution to a dedicated substrate, preventing the traces from becoming excessively long when routing across the entire PCB. The timing package becomes an independent module that can be positioned close to IC packages requiring clock signals.
Solution Approach 2:
The patent introduces a separate timing package as an intermediary component between the PCB and IC packages. This intermediate substrate serves as a local distribution point for clock signals, reducing the trace length required to reach IC packages while maintaining electrical connection. The timing package acts as a mediator that consolidates clock signal routing in a localized area.
2Reliability
If clock signal traces are routed on the PCB, then electrical connection is established, but exposure to radiated noise from other circuitry increases causing signal distortion
Solution Approach 1:
The patent extracts the timing circuitry from the noisy PCB environment and places it in a separate integrated circuit package. This extraction removes the clock signal traces from the main PCB where they would be exposed to radiated noise from other circuitry. The dedicated timing package substrate provides a controlled environment with minimized electromagnetic interference.
Solution Approach 2:
The patent converts the potential harm of having distributed timing circuitry across the noisy PCB into a benefit by consolidating it in a separate package. This consolidation, while changing the physical arrangement, actually reduces noise exposure by creating a localized, controlled environment for sensitive clock signals away from other noise-emitting components.
3Adaptability or versatility
If timing circuitry is distributed across the PCB, then various operations can be performed, but routing complexity and parasitic characteristics increase
Solution Approach 1:
The patent merges the timing circuitry into a single integrated circuit package rather than distributing it across the PCB. This consolidation simplifies routing by providing a centralized location for clock signal generation and distribution. The timing package can still serve multiple IC packages through controlled impedance traces optimized for clock signal distribution within the package substrate.
Solution Approach 2:
The timing package serves as a universal clock distribution solution that can support multiple IC packages simultaneously. By consolidating timing circuitry in a separate package with multiple output traces, the system maintains operational flexibility to provide clock signals to various IC packages while reducing overall routing complexity compared to individual PCB traces to each package.
Data Source
AI summary
Systems, apparatus, articles of manufacture, and methods are disclosed comprising: an integrated circuit package including a package substrate, the package substrate including a first contact and a second contact, the first contact to be electrically coupled to a printed circuit board (PCB); and a timing package distinct from the integrated circuit package, the timing package including a third contact, the third contact to be electrically coupled to the second contact independent of the PCB.