Timing Phase Selection for Fast Burst-Mode PLL Acquisition
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Solution Overview
Problem
Conventional Phase-Locked Loops (PLLs) face extended acquisition times and 'hang-up' conditions due to random phase variations in communication signals, particularly when the received data and clock signal are 180° out of phase, leading to inefficient timing acquisition in burst mode communication environments.
Innovation Solution
A timing phase selection module is introduced to rapidly align the PLL with the signal phase by sampling the received signal across multiple timing phases and using pattern detection to select the most closely matched phase, thereby avoiding the hang-up condition and ensuring quick timing acquisition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional PLL is used for timing acquisition in burst mode communication, then the system can operate with simple hardware, but the timing acquisition time becomes unacceptably long due to random phase variations and hang-up conditions
Solution Approach 1:
The patent applies preliminary action by pre-generating multiple timing phases (e.g., 4 phases spaced 90 degrees apart) before signal reception. When a burst signal arrives, the system can immediately sample the signal at multiple pre-prepared phases and quickly determine the optimal phase alignment without requiring the PLL to slowly acquire timing from scratch. This pre-positioning of multiple timing references enables fast timing acquisition while avoiding hang-up conditions.
Solution Approach 2:
The patent segments the timing acquisition process into discrete phase sampling steps. Instead of using a single continuous PLL loop, the system divides timing acquisition into multiple discrete phase samples (e.g., 4 separate timing phases), each sampled independently. The optimal phase is selected from these segmented samples, allowing rapid determination of the best timing alignment without the slow convergence of traditional PLL methods.
2Productivity
If multiple timing phases are sampled and compared to determine optimal phase alignment, then fast timing acquisition is achieved, but the device complexity increases due to additional sampling circuitry and processing
Solution Approach 1:
The patent applies periodic action by sampling the received signal at multiple regularly-spaced timing phases (e.g., 4 phases at 90-degree intervals). This periodic sampling approach allows the system to efficiently evaluate different phase alignments by comparing samples taken at predetermined intervals, enabling fast determination of optimal phase alignment through systematic periodic measurement rather than continuous searching.
Solution Approach 2:
The patent uses feedback by comparing the sampled signal values at multiple timing phases and using this comparison information to determine which phase provides the best alignment with the incoming data. The system feeds back the phase comparison results to select the optimal timing phase, creating a closed-loop decision process that rapidly identifies the correct timing alignment based on the sampled evidence.
Data Source
AI summary
Signal timing phase selection and timing acquisition apparatus and techniques are disclosed. A timing phase that is most closely aligned with a phase of information carried by a received signal is selected from a plurality of timing phases. The selected timing phase may be used, for example, as a reference signal for a phase detector in a Phase-Locked Loop (PLL). The received signal may be sampled one or more times per timing phase. In a multiple-sample implementation, the samples may be used for timing phase selection, for detection of a known initial pattern of a burst of information to thereby detect the start time of a an information burst, or both.