Timing Recovery System Using Timestamp Compensation

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Solution Overview

Problem

The existing methods for timing recovery in digital data transmission, particularly in MPEG-2 systems, require large FIFO buffers to compensate for jitter introduced by transmission channels, leading to high hardware costs.

Innovation Solution

A timing recovery method and system that calculates a compensation value using a channel timer value and a timestamp to adjust the processing timing of received data packets, eliminating the need for a large FIFO buffer by synchronizing the channel timer unit with the source end timer unit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large FIFO buffers are used to compensate for jitter introduced by transmission channels, then timing synchronization is improved, but hardware cost increases

Engineering Contradiction:
Improvetiming synchronizationVSAvoidhardware cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the timing compensation function from the traditional FIFO buffer approach and implements it through a calculating unit that computes compensation values based on timestamps and channel timer values. This removes the need for large buffering hardware while maintaining jitter compensation capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical FIFO buffer system with a computational approach using a calculating unit that processes timing information through mathematical calculations. This substitution eliminates the physical buffering hardware in favor of a software-based or computational timing recovery mechanism.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Device complexity

If timestamps and channel timers are used to calculate compensation values, then hardware complexity is reduced, but timing recovery precision must be maintained

Engineering Contradiction:
Improvehardware complexityVSAvoidtiming recovery precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent implements a feedback mechanism where the calculating unit continuously computes compensation values based on the difference between timestamps and channel timer values, and this compensation is applied to adjust the processing timing of received data packets. This closed-loop feedback ensures precise timing recovery while using simple hardware components.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system uses its own timing resources (channel timer unit and timestamp information) to generate the compensation values needed for timing recovery. The calculating unit leverages existing timing signals from the transmission channel rather than requiring external precision timing sources, enabling the system to self-correct timing deviations.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7778277B2Timing recovery method and system thereof
Publication Date: 2010.08.17 MEDIATEK INC
  • US7778277B2 patent drawing
  • US7778277B2 patent drawing
  • US7778277B2 patent drawing

AI summary

A timing recovery method includes receiving a plurality of data packets via a transmission channel, wherein at least a data packet is attached with a timestamp generated according to a channel clock of the transmission channel at a source end; calculating a compensation value according to the timestamp and a channel timer value upon receipt of the data packet, wherein the channel timer value is generated by the channel clock of the transmission channel at a destination end; and utilizing the calculated compensation value to adjust processing timing of the received data packets.