Timing Unit Setup-Time Measurement Through Critical Clock Periods
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Solution Overview
Problem
Existing methods for measuring setup time of timing units in digital integrated circuits suffer from large measurement errors due to limitations in clock phase adjustment and buffer delays, which vary under different test voltages, leading to inconsistencies between theoretical and actual values.
Innovation Solution
A circuit and method that utilizes multiple test paths to determine setup time by measuring critical periods of clock signals through a clock signal generation module, selection modules, and a control module, independent of buffer delays and voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If clock phase fine adjustment or buffer-based measurement is used, then setup time measurement can be performed, but measurement precision deteriorates due to adjustable range limitations and buffer delay variations under different voltages
Solution Approach 1:
The patent changes the measurement parameter from absolute time to period ratio. By measuring the ratio between the clock signal period and the data signal period, the method eliminates the influence of buffer delays and voltage variations, achieving consistent measurements across different test conditions
Solution Approach 2:
The patent introduces a delay detection module as an intermediary that measures the period of signals rather than directly measuring setup time. This intermediary measurement approach allows indirect determination of setup time through period ratios, avoiding direct exposure to voltage-dependent buffer delays
2Productivity
If traditional measurement methods are used, then setup time can be measured, but measurement error increases due to differences between clock path and data path
Solution Approach 1:
The patent segments the measurement process into three independent period measurements: clock signal period, data signal period through delay detection module, and data signal period through timing unit. By measuring each segment independently and calculating their ratio, the method eliminates path difference errors
Solution Approach 2:
The patent creates a copied measurement path through the delay detection module that mirrors the data signal path without involving the timing unit. This copied path provides a reference measurement that can be compared against the actual timing unit measurement to eliminate path-dependent errors
Data Source
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AI summary
A timing unit establishing time measuring method and measuring circuit. The measuring method comprises: respectively determining a first period value, a second period value and a third period value of clock signals, wherein the first period value is a critical period of a clock signal when a timing unit (170) under test can correctly receive a data signal at a first test path, the second period value is a critical period of a clock signal when a delay detection module (140) can correctly receive a data signal at a second test path, and a third period value is a critical period of a clock signal when the delay detection module (140) can correctly receive a data signal at a third test path (S210); and determining an establishing time of the timing unit according to the first period value, the second period value, and the third period value (S220).