Tin-Doped IZO Protective Layer for Display Spacer Etching
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Solution Overview
Problem
Existing display device manufacturing processes face issues with undesirable stamping and pressing of spacers, leading to electrode etching and potential damage during spacer formation.
Innovation Solution
Incorporation of a protective layer made of IZO doped with 5-10% tin, which minimizes spacer damage and electrode etching by using a fast etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a mask is used during the manufacturing process to form a light emitting layer, then the light emitting layer can be formed, but the spacer may be stamped or pressed causing damage
Solution Approach 1:
A protective layer is introduced as an intermediary between the mask and the spacer. This protective layer absorbs the stamping and pressing forces during the light emitting layer formation process, preventing direct contact between the mask and the spacer, thereby protecting the spacer from damage while still allowing the light emitting layer to be formed using the mask
2Ease of manufacture
If a spacer is stamped or pressed during manufacturing, then the spacer can be formed, but electrode etching occurs
Solution Approach 1:
The protective layer serves as a mediator during the spacer formation process. When the spacer is stamped or pressed, the protective layer is positioned between the stamping tool and the electrode areas, preventing direct contact that would cause etching. This allows the spacer to be formed while protecting the electrode from damage
Solution Approach 2:
The protective layer is formed on the spacer before the electrode formation process. This preliminary protective coating prevents electrode etching during subsequent manufacturing steps where the spacer may be stamped or pressed, ensuring electrode integrity while still allowing spacer formation
Data Source
AI summary
The present disclosure provides a display device including: a substrate; a plurality of transistors positioned on the substrate; an insulating layer positioned on the transistors; a light emitting device positioned on the insulating layer and electrically connected to the transistors; a partition wall and a spacer positioned on the insulating layer, and a protective layer on the spacer, the protective layer including an IZO doped with 5 at % to 10 at % of tin. The protective layer reduces pressure on the spacer and minimizes etching of an electrode during formation of the spacer.