Tin-Doped IGZO Channel Layer Etching Selectivity

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Solution Overview

Problem

The existing thin film transistor display devices face issues with the etching selectivity between metal oxide channel layers, such as IGZO, and source/drain electrodes, leading to over-etching of the channel layer and poor electrical properties due to the simultaneous etching of the channel layer during the patterning of source/drain electrodes.

Innovation Solution

A thin film transistor structure is developed with a channel layer composed of a metal oxide semiconductor material that includes tin and at least one of gallium, hafnium, and aluminum, which prevents the channel layer from being etched during the process of defining the source/drain electrodes, thereby maintaining the required thickness and electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If IGZO semiconductor is selected as the channel layer to improve electron mobility, then electrical performance is improved, but etching selectivity between the channel layer and source/drain electrodes deteriorates

Engineering Contradiction:
Improveelectrical performanceVSAvoidetching selectivity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent modifies the chemical composition parameters of the channel layer by adding tin (Sn) and aluminum (Al) to the IGZO base material. This compositional parameter change creates a new material (IGZO:Sn:Al) that maintains high electron mobility while developing resistance to aluminic acid etching, thus resolving the contradiction between electrical performance and etching selectivity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates a composite semiconductor material by combining multiple metal oxides (Indium Oxide, Gallium Oxide, Zinc Oxide, Tin Oxide, and Aluminum Oxide) in specific ratios. This composite material approach allows the channel layer to simultaneously achieve high electron mobility from the IGZO base and etching resistance from the Sn and Al components

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If liquid etchant is used to pattern source/drain electrodes, then electrode definition is achieved, but the channel layer is overly etched

Engineering Contradiction:
Improveelectrode patterningVSAvoidchannel layer thickness control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary substance - aluminum dopant - into the channel layer material composition. This intermediary element acts as a chemical barrier that reduces the reactivity between the aluminic acid etchant and the channel layer, allowing the etching process to proceed without excessive removal of channel layer material

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If channel layer thickness is reduced due to over-etching, then etching process completeness is improved, but thin film transistor operation reliability deteriorates

Engineering Contradiction:
Improveetching process efficiencyVSAvoiddevice operation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies beforehand cushioning by pre-doping the channel layer with tin and aluminum elements before the etching process. This preparatory modification creates a protective chemical composition that cushions the channel layer against excessive etching, ensuring that the etching process can complete electrode patterning without compromising the minimum required channel layer thickness for device operation

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS9666727B2Display device
Publication Date: 2017.05.30 INNOLUX CORP
  • US9666727B2 patent drawing
  • US9666727B2 patent drawing
  • US9666727B2 patent drawing

AI summary

A display device is provided. A thin film transistor structure of the display device includes a substrate, a gate electrode disposed on the substrate, a gate insulation layer disposed on the substrate and the gate electrode, a channel layer on the gate insulation layer and corresponding to the gate electrode, and a source electrode and a drain electrode contacting two sides of the channel layer, respectively, and extending onto the gate insulation layer. The channel layer includes a first metal oxide semiconductor layer, which includes (1) tin and (2) at least one of gallium, hafnium, and aluminum.