TiSiN Capacitor Conductive Layer Preventing Etchant Infiltration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for forming capacitors with cylinder type storage electrodes in semiconductor devices often result in bunker defects in the interlayer dielectric, leading to increased probabilities of short circuits and bridging between electrodes, which decrease manufacturing yield and reliability.
Innovation Solution
A method involving the formation of a TiSiN layer by flowing a silicon source gas over a TiN layer deposited as a conductive layer, preventing etchant infiltration and subsequent bunker defects, and including steps for annealing and removing portions of the conductive layer to form storage electrodes and dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a TiN layer is deposited as a conductive layer for storage nodes, then the electrode capacity is improved, but grain boundaries, pinholes or cracks occur in the TiN layer leading to bunker defects
Solution Approach 1:
The patent applies composite materials by combining TiN with silicon to form a TiSiN layer. This composite structure integrates the high conductivity of TiN with the defect-healing capabilities of silicon, creating a material that maintains electrode capacity while eliminating grain boundaries, pinholes, and cracks that cause bunker defects.
Solution Approach 2:
The patent changes the compositional parameters of the conductive layer by introducing silicon atoms into the TiN matrix through gas flow. This parameter change transforms the material properties, filling structural defects and creating a more reliable conductive layer without sacrificing the electrical conductivity needed for electrode capacity.
2Quantity of substance
If the TiN layer thickness is increased to elevate capacity, then electrode capacity is improved, but etchant infiltration through defects causes bunker defects in interlayer dielectric
Solution Approach 1:
By creating a TiSiN composite layer, the patent provides a denser, more impermeable structure that prevents etchant infiltration. The silicon component fills the grain boundaries and pinholes that would otherwise serve as pathways for etchant to reach the interlayer dielectric, thereby preventing bunker defects even when the layer thickness is increased for higher capacity.
Solution Approach 2:
The patent converts the potential harm of increased layer thickness (which would amplify defect-related etchant infiltration) into a benefit by using the additional material to create a more robust composite structure. The thicker TiSiN layer, when properly formed, provides enhanced protection against etchant infiltration while maintaining the desired capacity.
3Productivity
If bunker defects occur in interlayer dielectric, then manufacturing yield decreases, but short circuits and bridging between electrodes increase
Solution Approach 1:
The patent applies preliminary action by addressing the root cause of bunker defects (TiN layer defects) before the dip-out process occurs. By forming the TiSiN layer with reduced defects prior to etching, the patent prevents etchant infiltration and subsequent bunker defects in the interlayer dielectric, thereby maintaining both manufacturing yield and electrical isolation reliability.
Solution Approach 2:
The patent provides beforehand cushioning by creating a defect-reduced TiSiN conductive layer that acts as a protective barrier. This cushioning layer prevents the propagation of defects to the interlayer dielectric during subsequent processing steps, thereby cushioning against the harmful effects of bunker defects on both yield and electrical isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents bunker defects, reducing the likelihood of short circuits and bridging between electrodes, thereby enhancing manufacturing yield and semiconductor device reliability.
Implementation Method 1
forming a silicon-containing conductive layer by flowing a silicon source gas for the semiconductor substrate formed with the conductive layer so that silicon atoms can penetrate into the conductive layer
Implementation Method 2
forming a silicon-containing conductive layer... preventing etchant infiltration and subsequent bunker defects
Implementation Method 3
including steps for annealing and removing portions of the conductive layer
Data Source
AI summary
Forming a capacitor of a semiconductor device includes forming an interlayer dielectric having holes over a semiconductor substrate. A conductive layer is then formed on surfaces of the holes and on the upper surface of the interlayer dielectric. A silicon-containing conductive layer is formed by flowing a silicon source gas for the semiconductor substrate formed with the conductive layer, so that silicon atoms can penetrate into the conductive layer. The silicon-containing conductive layer prevents etchant from infiltrating the interlayer dielectric below the silicon-containing conductive layer.