Titanium Silicide Gate Line Agglomeration Control
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Solution Overview
Problem
Titanium silicide agglomeration during the fabrication of transistor gate lines in integrated circuits, particularly in DRAM circuitry, is unpredictable and uncontrollable, leading to variations in operating characteristics and potential fatal shorts due to the migration of titanium silicide into the polysilicon, affecting the work function and threshold voltage of transistors.
Innovation Solution
Interposing a composite layer of MSiz over an MSixNy layer over an MSiw layer between the titanium silicide and polysilicon, where 'x' ranges from 0 to 3.0, 'y' ranges from 0.5 to 10, and 'z' ranges from 1 to 3.0, with 'M' being at least one of Ta, Hf, Mo, and W, to form an electrically conductive line stack that reduces agglomeration and promotes the C54 phase of titanium silicide.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high temperature annealing is applied to convert amorphous titanium silicide to crystalline C54 phase, then electrical conductance is improved, but titanium silicide agglomeration occurs and migration into polysilicon is caused
Solution Approach 1:
A nitrogen-containing metal silicide layer (MSixNy) is introduced as an intermediary barrier between the titanium silicide and polysilicon. This intermediate layer prevents direct interaction and migration of titanium silicide into the polysilicon during high-temperature annealing, while still allowing the desired phase transformation to occur.
Solution Approach 2:
The invention uses a composite structure consisting of multiple layers: the titanium silicide layer, the nitrogen-containing metal silicide barrier layer, and the polysilicon layer. This composite structure combines the electrical conductivity benefits of crystalline titanium silicide with the protective properties of the nitrogen-containing barrier layer.
2Manufacturing precision
If high temperature annealing is applied to promote C54 phase formation, then resistivity is reduced, but phase transition control becomes difficult and agglomeration increases
Solution Approach 1:
The nitrogen-containing metal silicide layer acts as a mediator that facilitates controlled phase transition. The nitrogen content and specific composition of this intermediate layer provide a template or guiding structure that promotes uniform C54 phase formation without requiring extreme temperature variations.
Solution Approach 2:
The invention changes the chemical composition parameters of the intermediate layer by controlling nitrogen content (x values from 0 to 3.0) and metal composition (M being Ta, Hf, Mo, or W). These parameter changes in the intermediate layer create optimal conditions for controlled phase transition to C54 phase at manageable temperatures.
3Ease of manufacture
If titanium silicide is deposited directly over polysilicon, then fabrication process is simplified, but unpredictable agglomeration and device-to-device variability occur
Solution Approach 1:
The nitrogen-containing metal silicide layer serves as an intermediary that ensures consistent and predictable interface properties between titanium silicide and polysilicon. This intermediate layer eliminates device-to-device variability by providing a uniform barrier that prevents unpredictable agglomeration events.
Solution Approach 2:
The intermediate nitrogen-containing metal silicide layer is formed in advance before titanium silicide deposition. This preliminary action prepares a controlled interface that prevents future agglomeration problems, ensuring consistent device performance from the outset.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces titanium silicide agglomeration, enhancing the predictability and consistency of transistor gate line characteristics by controlling the phase transition of titanium silicide to the desired C54 phase, thereby minimizing resistance and ensuring reliable operation of DRAM circuitry.
Implementation Method 1
An MSixNy-comprising layer is formed over the electrically conductive layer... to reduce titanium silicide agglomeration
Implementation Method 2
Crystalline stoichiometric titanium silicide (TiSi2) typically exists in one of two different crystalline phases... C49 phase... C54 phase... the less-desired C49 phase to be initially deposited or formed. This C49 phase can then be converted to a desired C54 phase through appropriate annealing conditions.
Implementation Method 3
Amorphous titanium silicide can be converted to crystalline titanium silicide by high temperature anneal
Implementation Method 4
An electrically conductive layer is formed over the silicon-comprising layer... to form an electrically conductive line
Data Source
AI summary
The invention includes an electrically conductive line, methods of forming electrically conductive lines, and methods of reducing titanium silicide agglomeration in the fabrication of titanium silicide over polysilicon transistor gate lines. In one implementation, a method of forming an electrically conductive line includes providing a silicon-comprising layer over a substrate. An electrically conductive layer is formed over the silicon-comprising layer. An MSixNy-comprising layer is formed over the electrically conductive layer, where “x” is from 0 to 3.0, “y” is from 0.5 to 10, and “M” is at least one of Ta, Hf, Mo, and W. An MSiz-comprising layer is formed over the MSixNy-comprising layer, where “z” is from 1 to 3.0. A TiSia-comprising layer is formed over the MSiz-comprising layer, where “a” is from 1 to 3.0. The silicon-comprising layer, the electrically conductive layer, the MSixNy-comprising layer, the MSiz-comprising layer, and the TiSia-comprising layer are patterned into a stack comprising an electrically conductive line. Other aspects and implementations are contemplated.