Transaction Level Power Estimation via Characteristic Extractors
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Solution Overview
Problem
Current transaction level (TL) power estimation methods are inadequate for early-stage design, particularly in electronic system level (ESL) design, due to the lack of mature solutions for high-level power consumption analysis, leading to increased development cycles and Time-to-Market challenges.
Innovation Solution
A TL system power estimation method and system that includes inserting a characteristic extractor into electronic devices for power characteristic extraction during TL simulation, using a power model to convert these characteristics into consumption values, which are recorded in a power database, enabling high-level power estimation and reducing development cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional RTL design methodology is used for power estimation, then power consumption can be estimated, but the development cycle is too time-consuming
Solution Approach 1:
The patent transitions power estimation from the traditional RTL dimension to a new transaction-level dimension. By inserting characteristic extractors at the transaction level (higher abstraction) rather than RTL level (lower abstraction), the system enables power estimation earlier in the design cycle without sacrificing accuracy, thus resolving the time-accuracy tradeoff
Solution Approach 2:
The patent performs power estimation actions at the transaction level before the design is finalized at RTL level. The characteristic extractors are inserted early to capture power-relevant features during transaction-level simulation, enabling preliminary power analysis that would otherwise require waiting until later RTL or gate-level stages
2Productivity
If ESL design methodology is adopted to reduce development cycle, then productivity improves, but power estimation capability is insufficient
Solution Approach 1:
The patent introduces characteristic extractors as intermediary components that bridge the gap between ESL transaction-level models and power estimation requirements. These extractors intercept transaction data at the ESL level and transform it into power-relevant characteristics, enabling accurate power analysis without leaving the ESL productivity benefits
Solution Approach 2:
The patent replaces the traditional mechanical approach of down-converting ESL models to RTL for power analysis with a new information-processing approach. Instead of transforming the design model itself, the system substitutes a data extraction and transformation mechanism that operates directly on ESL transaction data to derive power characteristics
3Ease of manufacture
If RTL power engine is used for TL power estimation, then existing tools can be utilized, but the estimation cannot reflect high-level power characteristics
Solution Approach 1:
The patent creates a virtual copy of the power analysis function adapted for transaction level. Instead of using the original RTL power engine directly, it implements a TL-adapted version that copies the essential power estimation logic but operates on transaction-level characteristics extracted from ESL models, maintaining tool availability while achieving high-level accuracy
Data Source
AI summary
A transaction level (TL) system power estimation method and system are provided. The method includes inserting at least a characteristic extractor into an electronic device of a target system. The characteristic extractor extracts at least a power characteristic of the electronic device when a TL simulation is proceeding. The power characteristic provided from the characteristic extractor is converted to at least a power consumption value by using a power model. The power consumption value is recorded into a power database, for analyzing power consumption of the whole target system. In some embodiments, the TL system power estimation method and system can be applied in the target system with dynamic power management. The TL system power estimation method and system also can be used with a high-level synthesizer to develop the power-aware electronic device in a short time.