TLB and Cache Context Tagging for VM Switching

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current digital computer systems face inefficiencies in supporting context switching and world switching between virtual machines and operating systems, particularly in managing TLBs and virtually tagged caches, which leads to unnecessary flushes and virtual address aliasing issues.

Innovation Solution

Implementing a method and system that uses context identifiers and global indicators in TLB and cache entries to uniquely identify and manage entries across multiple virtual machines, allowing for efficient memory protection and address translation, thereby reducing the need for unnecessary flushes and preventing aliasing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional TLB and cache management is used during context switching, then all TLB/cache entries must be flushed to ensure correctness, but this causes significant performance loss and waste of time

Engineering Contradiction:
Improvecorrectness of address translationVSAvoidtime for TLB/cache flush
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments TLB and cache entries by associating each entry with a specific virtual machine context identifier. This segmentation allows the system to selectively invalidate only the entries belonging to the switched-out virtual machine context, rather than flushing the entire TLB/cache. The segmentation is implemented through context tags in TLB entries and context-specific cache tagging, enabling precise control over which translations remain valid during context switches.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by making TLB and cache entries context-specific rather than universal. Each TLB entry and cache line is tagged with context information (virtual machine ID, process ID, or thread ID) that defines its local validity scope. This allows different parts of the address translation hierarchy to have different validity characteristics based on their context association, enabling selective preservation of valid entries during context switches.

Inventive Principle:
Principle #3Local quality

2Productivity

If global pages are supported across virtual machines, then address translation efficiency improves, but virtual address aliasing problems occur

Engineering Contradiction:
Improveaddress translation efficiencyVSAvoidvirtual address aliasing
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent implements preliminary action by pre-tagging TLB and cache entries with context identifiers (virtual machine context, process context, or thread context) before they are used. This preliminary tagging allows the system to later determine with certainty whether an entry is valid for the current context without performing aliasing checks during address translation. The context tags are established when entries are first created or loaded, enabling fast validation during subsequent operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces context identifiers as an intermediary between virtual addresses and physical address translation. This intermediary layer (context tag) allows the system to distinguish between different virtual machine contexts that might otherwise have aliasing issues. The context identifier acts as a mediator that enables global page support while preventing aliasing by ensuring that translations are only valid within their designated context.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8522253B1Hardware support for virtual machine and operating system context switching in translation lookaside buffers and virtually tagged caches
Publication Date: 2013.08.27 INTELLECTUAL VENTURES II LLC
  • US8522253B1 patent drawing
  • US8522253B1 patent drawing
  • US8522253B1 patent drawing

AI summary

A method for tagging cache entries to support context switching for virtual machines and for operating systems. The method includes, storing a plurality of entries within a cache of a CPU of a computer system, wherein each of the entries includes a context ID, handling a first portion of the entries as local entries when the respective context IDs indicate a local status, and handling a second portion of the entries as global entries when the respective context IDs indicate a global status.