TLB Counter Registers for Per-VM I/O Monitoring

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Solution Overview

Problem

In cloud computing, the lack of I/O traffic monitoring by the hypervisor due to direct I/O device assignment to virtual machines hinders effective management and application performance, as the hypervisor is bypassed in I/O transactions, leading to difficulties in managing virtual machines and tracking I/O usage.

Innovation Solution

A system and method utilizing a translation lookaside buffer (TLB) with counter registers to monitor I/O traffic by tracking data transfers between I/O devices and memory, employing a mapping table to associate virtual machines with counter registers and devices, enabling per-VM I/O traffic monitoring through hardware counters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If direct I/O device assignment to virtual machines is implemented, then I/O performance is improved, but I/O traffic monitoring capability deteriorates

Engineering Contradiction:
ImproveI/O performanceVSAvoidI/O traffic information
Core Design Contradiction:
SpeedVSLoss of information

Solution Approach 1:

The patent introduces a hypervisor as an intermediary layer between the I/O devices and virtual machines. The hypervisor intercepts I/O transactions through mechanisms like virtualization-aware I/O drivers or hypervisor hooks, allowing it to monitor and account for I/O traffic without preventing the direct I/O path from functioning. This mediator approach enables the system to maintain high I/O performance while simultaneously capturing traffic statistics for management purposes.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If hypervisor is bypassed in I/O transactions, then I/O transaction speed is improved, but I/O traffic accounting capability deteriorates

Engineering Contradiction:
ImproveI/O transaction speedVSAvoidI/O traffic measurement
Core Design Contradiction:
SpeedVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements feedback mechanisms where the hypervisor receives I/O transaction information through interrupts, event notifications, or polling from the virtual machine or I/O device. This feedback loop allows the hypervisor to continuously update I/O traffic accounts and monitoring data structures, ensuring that traffic measurement capabilities are maintained even when the I/O path bypasses the hypervisor for performance reasons.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent employs preliminary action by pre-configuring the system with hypervisor hooks, virtualization-aware drivers, or intercept points before I/O transactions occur. These pre-established monitoring mechanisms are ready to capture traffic data as soon as I/O operations begin, enabling the system to measure and account for traffic without adding significant overhead to the I/O transaction speed.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If direct I/O path is used, then I/O performance is improved, but I/O management capability deteriorates

Engineering Contradiction:
ImproveI/O performanceVSAvoidVirtual machine management
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The hypervisor serves as a mediator that maintains management capabilities despite the direct I/O path. Through the intermediary mechanisms described above (hypervisor hooks, virtualization-aware drivers), the hypervisor continues to have visibility into I/O transactions, allowing it to perform management functions such as resource allocation, QoS enforcement, and billing calculations, thereby preserving ease of operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11023397B2System and method for monitoring per virtual machine I/O
Publication Date: 2021.06.01 CLOUD INTELLIGENCE ASSETS HOLDING (SINGAPORE) PTE LTD
  • US11023397B2 patent drawing
  • US11023397B2 patent drawing
  • US11023397B2 patent drawing

AI summary

The present disclosure provides a system for monitoring I/O traffic. The system includes a memory storing information, a device, and a translation lookaside buffer (TLB). The device is configured to send a request for accessing information from the memory. The TLB includes a counter register file having counter registers, and entries having corresponding counter ID fields. The TLB is configured to receive a source identifier of the device and a virtual address associated with the request from the device, select an entry of the entries using the source identifier and the virtual address, select a counter register from the counter registers in accordance with information stored in the counter ID field of the selected entry, and update a value of the selected counter register in accordance with data transferred in association with the request.