Dynamic TLB Entry Sizing for Multi-Application Execution
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Solution Overview
Problem
Conventional techniques for managing translation look-aside buffer (TLB) entries lead to inefficient use of TLB resources, resulting in increased TLB miss rates when multiple applications are executed concurrently, as the page size of TLB entries is determined based on the largest text portion, causing wasted space and reduced address range storage capacity.
Innovation Solution
A program execution device that includes a program loader, an address conversion table creator, and a TLB register, which analyzes access frequency information to adjust the size of TLB entries for frequently accessed logical address ranges, and locks these entries to prevent changes, thereby optimizing TLB usage and reducing TLB misses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the page size of TLB entry is increased to expand address range stored in TLB entry, then the TLB miss rate for a single application decreases, but the TLB resources cannot be efficiently used when multiple applications are concurrently executed
Solution Approach 1:
The patent applies dynamics by making the TLB entry page size adjustable rather than fixed. The system dynamically changes the page size based on access frequency information - frequently accessed address ranges use larger page sizes to reduce TLB misses, while less frequently accessed ranges use smaller page sizes to preserve TLB resources for other applications. This dynamic adaptation resolves the contradiction between reducing TLB misses and maintaining TLB resource efficiency.
Solution Approach 2:
The patent changes the parameter of page size based on access frequency. By analyzing access frequency information and adjusting the page size parameter accordingly, the system optimizes TLB performance for frequently accessed addresses while maintaining efficient resource utilization across multiple applications. This parameter change strategy directly addresses the technical contradiction.
2Length of stationary object
If the page size of TLB entry is determined based on the largest text portion in programs, then the address range for large programs is covered, but wasted space increases and TLB capacity is reduced
Solution Approach 1:
The patent applies local quality by assigning different page sizes to different address ranges based on their specific access characteristics. Instead of using a uniform large page size for all entries, the system analyzes access frequency information and assigns larger page sizes only to frequently accessed address ranges, while using smaller page sizes for less frequently accessed ranges. This local differentiation eliminates wasted space while ensuring adequate coverage for important address ranges.
Solution Approach 2:
The patent changes the page size parameter based on access frequency analysis. By adjusting this parameter locally for different address ranges rather than using a fixed large size, the system reduces wasted TLB space while maintaining sufficient address range coverage for frequently accessed programs.
3Productivity
If access frequency analysis is performed to adjust TLB entry sizes, then TLB resource efficiency improves, but system complexity increases
Solution Approach 1:
The patent applies preliminary action by performing access frequency analysis during the program loading phase rather than during runtime. The program loader collects access frequency information and the address conversion table creator uses this information to determine optimal page sizes before the program executes. This preliminary analysis avoids adding complexity to the runtime execution path while still achieving efficient TLB resource utilization.
Solution Approach 2:
The patent introduces an intermediary mechanism - access frequency information - that bridges the gap between program characteristics and TLB configuration. This intermediary data allows the system to make informed decisions about page size allocation without requiring complex real-time analysis, thereby improving TLB efficiency while maintaining manageable system complexity.
Data Source
AI summary
A program execution device includes a program loader reading a machine language program including a machine language code and access frequency information; an address conversion table creator creating an address conversion table including entries, each of which indicates a relation between a logical address range and a physical address range; and a TLB register registering, in a TLB, an entry of the address conversion table storing a logical address range accessed according to the machine language code. When determining that the frequency of access to a logical address range is high based on the access frequency information, the address conversion table creator adjusts the size of an entry storing this logical address range to an appropriate size.