TLB Flushing via Designated Key ID for Memory Encryption

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Solution Overview

Problem

Current systems cannot manage the translation lookaside buffer (TLB) in the granularity of keys, making it difficult to securely and efficiently flush specific memory spaces protected by different keys, which is essential for protecting confidential data in multi-key memory encryption scenarios.

Innovation Solution

A processor architecture that includes a memory order buffer (MOB) and a control logic circuit for the TLB, allowing for the flushing of TLB entries based on a designated key ID, enabling precise management and flushing of TLB entries matching a specific key ID, rather than flushing the entire TLB or relying on process or virtual processor identifiers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the entire TLB is flushed to ensure security in multi-key memory encryption scenarios, then security is improved, but memory access speed deteriorates due to loss of cached translations

Engineering Contradiction:
Improvememory encryption securityVSAvoidmemory access speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The TLB is segmented into multiple key-specific subsets, where each subset is associated with a particular encryption key. Instead of flushing the entire TLB, only the subset corresponding to the evicted process's key is flushed. This segmentation allows selective invalidation of translations while preserving others, maintaining security for the specific key while avoiding unnecessary flushes that would degrade performance.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the TLB is flushed based on process context identifier or virtual processor identifier, then security is improved, but precision deteriorates because it cannot distinguish between different key-protected memory spaces

Engineering Contradiction:
ImprovesecurityVSAvoidkey identification precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The TLB entries are tagged with key identification codes that indicate which encryption key protects the corresponding memory space. This local quality differentiation allows the flush mechanism to precisely identify and invalidate only those entries associated with a specific key, rather than applying a coarse-grained flush based on process or virtual processor identifiers. The key ID tagging provides the necessary precision to distinguish between different key-protected memory spaces.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If key-specific TLB management is implemented, then precision of key-based flushing is improved, but device complexity increases due to additional control logic circuits

Engineering Contradiction:
Improvekey identification precisionVSAvoidcontrol logic circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The key identification code is merged into the existing TLB entry structure, combining the key management functionality with the standard translation storage. The control logic circuit integrates the key ID comparison functionality with the existing TLB search and invalidation mechanisms. This merging approach allows key-specific management to be implemented without requiring entirely separate hardware structures, thereby limiting the increase in device complexity while achieving precise key-based flushing.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11966738B2Processor and method for flushing translation lookaside buffer according to designated key identification code
Publication Date: 2024.04.23 VIA ALLIANCE SEMICON CO LTD
  • US11966738B2 patent drawing
  • US11966738B2 patent drawing
  • US11966738B2 patent drawing

AI summary

A technology for flushing a translation lookaside buffer (TLB) according to a designated key identification code (designated key ID). An instruction of an instruction set architecture is proposed to flush the TLB according to the designated key ID. A decoder transforms the instruction into at least one microinstruction. According to a flushing microinstruction included in the at least one microinstruction, a designated key ID is supplied to a control logic circuit of the TLB through a memory order buffer, so that the control logic circuit flushes matched entries in the TLB, wherein the matched entries match the designated key ID.