TLB Software Monitoring for COTS Processor Soft Errors
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Solution Overview
Problem
Commercial off-the-shelf (COTS) processors lack hardware-based protection mechanisms against soft errors caused by atmospheric neutrons, leading to high failure rates in avionics and space applications.
Innovation Solution
A microprocessor with a memory management unit (MMU) and translation lookaside buffer (TLB) maintained in non-error correcting code (ECC) memory, utilizing a software monitor to periodically check TLB descriptors against MMU configuration parameters, and reset the processor upon detecting soft errors to prevent erroneous data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If COTS processors are used in atmospheric environments, then cost and availability are improved, but reliability deteriorates due to lack of hardware protection mechanisms against soft errors
Solution Approach 1:
The patent introduces a software monitor as an intermediary layer between the TLB and the rest of the system. This monitor periodically checks TLB descriptors for soft errors and manages recovery, providing protection without requiring hardware-level complexity. The software monitor acts as a mediator that detects and handles errors, allowing COTS processors to be used while maintaining reliability.
Solution Approach 2:
The patent changes the state of TLB descriptors by setting specific bits (error detection bits, valid bits) to indicate error conditions. The software monitor reads these parameter changes to detect soft errors. By monitoring parameter changes in the TLB descriptors rather than adding complex hardware protection, the system achieves reliable operation with COTS processors.
2Speed
If TLB is maintained in non-ECC memory for performance, then speed is improved, but reliability deteriorates due to susceptibility to soft errors
Solution Approach 1:
The software monitor implements periodic checking of TLB descriptors to detect soft errors. Rather than continuously monitoring (which would slow down address translation), the system periodically samples the TLB state and checks for errors. This periodic action maintains high translation speed while providing reliability through regular error detection.
Solution Approach 2:
The software monitor provides feedback by reading the TLB descriptors, checking for error conditions, and taking corrective action when errors are detected. The monitor uses the valid bit and other descriptor fields as feedback signals to determine whether TLB entries are corrupted. This feedback mechanism ensures data integrity while allowing the TLB to operate at high speed in non-ECC memory.
3Reliability
If software monitoring is implemented to detect soft errors, then reliability is improved, but device complexity increases due to additional software functions
Solution Approach 1:
The software monitor creates a copy of the TLB descriptor data in general-purpose registers for analysis. Rather than duplicating the entire TLB structure or adding complex monitoring hardware, the system copies only the necessary descriptor fields into registers where they can be checked for errors. This copying approach provides reliable error detection with minimal additional complexity.
Solution Approach 2:
The software monitor leverages existing multi-functional CPU components (general-purpose registers, existing TLB structures, standard comparison operations) to perform error detection. Rather than creating dedicated error detection hardware or specialized software routines, the system uses universal CPU resources for multiple purposes: normal operation and error monitoring. This reduces the complexity overhead of the monitoring function.
Data Source
AI summary
A microprocessor is described. The microprocessor includes a software-based monitor for detecting TLB corruptions. The TLB corruptions contribute to undetected erroneous upset rate of the microprocessor. The software monitor detects errors in the TLB. The software-based monitor detects TLB corruptions in microprocessors where hardware protection mechanisms are not available. The software monitor mitigates single event effects due to atmospheric particles and improves the safety of high integrity computing products.